Program ELF to Microblaze's Flash

[bn3232]

I have a SDK Project, and I want to program it to flash.
In Xilinx SDK, when I choose "Program Flash", I get this error:
No usable flash memory controllers were found in the hardware system.
How can I solve it?
I tried converting download.bit file to .msc file and program the FPGA using IMPACT, but it doesn't work!

[Oleksandr Kiyenko]

Hello,

I need more information to help you.
Which module are you using?
Which tool ISE/EDK or Vivado ?

Best regards
Oleksandr Kiyenko

[Antti Lukats]

I have a SDK Project, and I want to program it to flash.
In Xilinx SDK, when I choose "Program Flash", I get this error:
No usable flash memory controllers were found in the hardware system.
How can I solve it?
I tried converting download.bit file to .msc file and program the FPGA using IMPACT, but it doesn't work!

Flash programming from SDK is only supported for PARALLEL NOR memories. None of modules has such memory, so you can not flash directly from SDK.

If you want to initialize BRAM with ELF than that is easy, SDK does it for you, you can then later flash with the combined .BIT that has bit file and ELF inside.
If you want to load ELF into external ram you need special bootloader, and custom script to create the file for the flash

[bn3232]

Hello,

I need more information to help you.
Which module are you using?
Which tool ISE/EDK or Vivado ?

Best regards
Oleksandr Kiyenko

I use ISE/EDK
My module is TE0600-2 LX45

[bn3232]

If you want to initialize BRAM with ELF than that is easy, SDK does it for you, you can then later flash with the combined .BIT that has bit file and ELF inside.

How can I combine .bit file and .elf file? I tried assigning elf file to XPS, and updating bitstream, then converting the generated bit file to msc (using impact). But it always fails to program in flash!
SPI data width seems to be 4 in Hardware, but in msc file, it is set to 1! This may cause failture in programming the FPGA.

[Oleksandr Kiyenko]

Hello,
> SPI data width seems to be 4 in Hardware, but in msc file, it is set to 1!
You can use flash in x1 x2 and x4 mode, difference is in used SPI read/write commands.

Bitstream settings and impact settings for SPI should be equal for correct boot. By default bitgen in ISE/XPS have x1 SPI settings and generate corresponding bit file.
So you have to write mcs in x1 mode or
- change bitgen settings to x4
- regenerate bit
- regenerate mcs
- write mcs in x4 mode (this way impact will set special nonvoulatile bits in flash control register)

Better, at first try to wtite flash in x1 mode.

WBR Oleksandr

[bn3232]

The problem was with the linker script.
data and code must be in BRAM, and stack and heap must be in DDR RAM.

[Antti Lukats]

well it depends, if you need CODE in DDR then you need custom bootloader, if initialized RAM fits into internal BRAM then you can avoid using custom bootloader.