TE0817-02 — PL logic intermittently fails

[randy]

Hello,
We are seeing a hardware-revision-specific issue with the TE0817 SOM and would appreciate guidance from Trenz or other users who may have encountered something similar.

Setup
We have a Vivado/PetaLinux design that has been running reliably on TE0817-01 for a long time. We recently moved to TE0817-02 boards (same carrier, same bitstream/software image where applicable) and started seeing PL-side malfunctions that do not occur on -01.

Symptoms
The specific PL block that fails is not consistent — it changes between Vivado recompiles of the same RTL/IP integration. We have observed, across different builds:

I2C transactions failing, causing sensor module detection to fail at boot.
Debug ILA cores not detecting/triggering correctly; in some builds, one specific ILA clock domain (out of several ILAs running on different clocks) simply does not capture data.
ILA trigger conditions being ignored — the core triggers immediately regardless of the configured trigger condition.
The frmbuf_wr IP issuing AXI write transactions on the bus even though it has not been enabled (no ap_start/enable asserted).
hdmi rx / tx failing

Linux boots normally every time, and PS-side functionality (including PS DDR) is unaffected. Only specific PL logic blocks malfunction, and which block fails appears to vary build-to-build.


This is not limited to a single unit — we have multiple TE0817-02 modules, and the issue is reproducible across all of them. This makes us confident it's a characteristic of the -02 revision itself rather than a single defective board.

Any insight into board-level differences not captured in the public PCN would be very helpful in narrowing this down.

Thank you in advance.

[Martin R @Trenz]

Hi Randy,

up to now we are not aware of any hardware issue on TE0817-02 modules.
There are no changes on the board not captured in public available PCN.

To get a more detailed view on the problem, can you please send us the build logs of problematic designs with all warning/error outputs enabled.

Some questions:
Do you utilize the VCU?
Are there any unconstrained path in your design?
Are all timing constraints met?
 
Can you further send us the Serial numbers (Number on square white QR Sticker) of affected REV02 boards and serial number of your REV01 board used for comparisons.

Please send all together to our support: support@trenz-electronic.de

best regards
Martin

[martensilk]

No modifications to the board have not been recorded in the publicly accessible PCN.

basketball stars

[/color]