TE0726 TRM V.3 - MIO48 - MIO49 Connection to USB

[qwaserdf]

Good morning.

I am struggling to understand, how my project can communicate by USB, through the UART1. If this one exchanges by MIO ports 48 & 49 (verified in design_1_wrapper_io_placed.rpt) and those, ones according to datasheet and electronic schematic, Zynq pins which are connected only to the I2C module:

Pin  Pin Memory   Bank  I/O Type
B12  PS_MIO48_501 501   MIO
D13  PS_MIO49_501 501   MIO

design_1_wrapper_io_placed.rpt
| Pin Number | Signal Name       | Pin Name                | Use
| B12        | FIXED_IO_mio[28]  | PS_MIO48_501            | OUT
| D13        | FIXED_IO_mio[29]  | PS_MIO49_501            | IN

datasheet:
Bank 501 MIOs
48    MUX_SCLI2C clock to I2C MUX.
49    MUX_SDAI2C data to/from I2C MUX.
...
Zynq MIO pin 48 (MUX_SCL) and pin 49 (MUX_SDA) are connected to the 4-channel I 2C multiplexer chip
TCA9544A from Texas Instruments having I2C address of 0x70. It has four slave I2C channels which are
routed as follows...

SCH-TE0726-03-07S-1C.pdf

If that I2C (TCA9544APWR) has no connection to the USB/UART (FT2232H-56Q), how do the signals arrive to these MIO ports?

Thanks in advance.

[qwaserdf]

I also see here that GPIOs 14 & 15, have the UART_XX labels. What does it mean?

Could it be a mistake, meaning that ID_SCL and ID_SDA, are connected somehow with the CPLD?

[qwaserdf]

I see that it also works fine even if I pick the EMIO port.

The only explanation that I see, the CPLD has more connections to the FPGA than the ones shown in the diagram.

Regards.

[MA]

Hi,

I am not entirely sure if I understood your question correctly.

The USB connector (J1) is connected to the FTDI device and provides:

one interface via JTAG to the Zynq (TCK, TDI, TDO and TMS)
as well as one UART interface via the signals C_TCK and C_TDI, which are routed through the CPLD and connected to MIO8 and MIO9 in the PS, where they are configured as UART1.

MIO48 and MIO49 are connected to I2C1

• https://wiki.trenz-electronic.de/display/PD/TE0726+CPLD#TE0726CPLD-UART
• https://wiki.trenz-electronic.de/display/PD/TE0726+Zynqberry+Demo1

Best regards,
Manuela

[qwaserdf]

Thank you Manuela for your answer.

Please have a look on this image:



What you see there is the output of a design that sends the UART1 connection through the EMIO, in the PL the signal is modified (making it '1' an immediate cycle after it is driven to '0') and connected to two GPIOs.

Despite the signal is corrupt and I am not connecting anything to those GPIOs, I keep receiving the "H" character in the upside terminal. So there must be a path somewhere else.

You are saying that the connection is made through the MIO8 and MIO9. However theoretically if I don´t enable it, they're not connected (ps7_init.html):



So it is confirmed despite of the selected port for the UART1, the connection through the MIO8-9 is established? Keeping the UART1 through the EMIO, and selecting MIO8-9 for CAN peripheral (as I see it's their other only purpose), will provoke that I don´t receive the messages anymore?

Regards.

[MA]

Hi,

At the moment, I am not fully sure if I understand the goal of the exercise correctly.

So your intention is to disconnect UART1 from J1 and verify that no UART outputs (e.g. the "H" character) appear anymore on the console at your PC?

If you are still receiving UART output on the console despite UART1 being disabled on MIO8 and MIO9, this could also be related to the signal levels of the UART connection routed through the CPLD.
Regards,

Manuela

[qwaserdf]

Hello,

It was only out of curiosity, since I realized that regardless of which MIO port I select for the UART1 communication, or even if I use the EMIO one, this is configured correctly. That feels a bit strange to me.

Besides that, there is something else I would like to ask about this board, if you don't mind. Please let me know if I should open a new topic for this question.

The version I bought of the ZynqBerry only has the J1 connector, and it also lacks many of the other resistors (purchased years ago from DigiKey: https://www.digikey.at/en/products/detail/trenz-electronic-gmbh/TE0726-03R/6141394).

I would like to know whether mounting the HDMI connector and the adjacent EMI filters would be enough to enable HDMI functionality, or if any other indispensable components are also missing.

Best regards.

[MA]

Hi,

The TE0726-03R is an assembly variant without Ethernet, USB and HDMI. The schematics and assembly documentation for your specific assembly variant can be found under the following link.

• https://www.trenz-electronic.de/Downloads/?path=Trenz_Electronic/Modules_and_Module_Carriers/special/TE0726/REV03/Documents

However, based on the DDR size, I assume that you may not be able to use the HDMI interface in the same way as on the standard variant (128 MB instead of 512 MB DDR).

Best regards