Init clk for Aurora IP on TE0817

[siddadd]

Hello,

I am trying to port some of my code from a Kria KR260 platform to the TE0817+TEBF0818.

I basically want to use the SFP+ with a loopback adaptor. On the FPGA, I have the Aurora 64/66 IP set up to use the GTH transceiver.

In KR260, there was a 156.25 MHz GT Ref clock and I used a free-running HPA clock as the Init clock for Aurora.

aurora_64b66b_0_exdes 
#(
    .USE_CORE_TRAFFIC   (1),
    .USR_CLK_PCOUNT     (9'd255),
      .EXAMPLE_SIMULATION (EXAMPLE_SIMULATION),   
    .USE_LABTOOLS             (0)
) i_aurora (
    .RESET              (aurora_0_if_reset_r),
     // Error Detection Interface
    .HARD_ERR           (aurora_0_if_hard_err),
    .SOFT_ERR           (aurora_0_if_soft_err),
    .DATA_ERR_COUNT (aurora_0_if_data_err_count),
     // Status
    .LANE_UP      (aurora_0_if_lane_up),
    .CHANNEL_UP   (aurora_0_if_channel_up),
      // Data Interface
      .rx_clk         (aurora_0_if_rx_clk),
      .rx_data          (aurora_0_if_rx_data_w),
      .rx_valid         (aurora_0_if_rx_valid_w),
      .rx_rstn        (aurora_0_if_rx_resetn),
     // System Interface
    .INIT_CLK           (aurora_0_if_init_clk),
    .PMA_INIT     (aurora_0_if_pma_init_r),
     // GTX Reference Clock Interface
    .GTHQ0_P      (mgtrefclk0_x0y1_p),
    .GTHQ0_N      (mgtrefclk0_x0y1_n),
     // GTX Serial I/O
    .RXP          (ch0_gthrx_p),
    .RXN          (ch0_gthrx_n),
    .TXP          (ch0_gthtx_p),
    .TXN          (ch0_gthtx_n)
 );

Similarly, on the TE0817, I mapped I/O pins F9,F10 (U5.out7) for the MGT Ref Clock of 156.25MHz.

However, I am not able to find a free-running clock on the TE0817 that I can use as the Init clock. Can you provide some details on that?

Thanks

[Antti Lukats]

you should use the PS derived clock, you need to modify the PS settings in Vivado and generate new FSBL and boot with it, then it all works