Hi.
After 10 years of working with Intel/Altera FPGAs, I've recently switch to a new department using Xilinx Ulatrascale ZYNQs.
So I privately purchased a TE0726 board to understand the underlying basics of such platforms.
I created a bare minimum FPGA design in Vivado 2020.2 with just the 2 PS-UARTs connected to some output pins (with FTDI2232 and osci connected).
Then I created a Vitis "standalone" application using the "Hello World" Xilinx example. I can download this to the ZynqBerry and can step through the code using the debugger.
But if I try the official Xilinx UART Demos, which are displayed in the Board-Support-Package GUI as "Examples", the whole platform behaves strangely:
The debugging resets in random places, XUartPs_LookupConfig doesn't report any configuration, ...
Does anybody know if it is possible to create "simple" bare metal applications, and can provide a link for an example project?
Or is it always recommended to use a petalinux OS?