I am trying to move my design from 2019.2 to 2020.2.
I tried with the prebuilt code, and everything seems to work correctly. I added my hardware design and built a petalinux. Now it does not seem to pick up the MAC from the FSBL, but it uses the devicetree MAC:
Any hints would be apreciated.
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Xilinx First Stage Boot Loader (TE modified)
Release 2020.2 Oct 11 2021-18:54:30
Device IDCODE: 23727093
Device Name: 7z020 (7)
Device Revision: 2
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TE0720 TE_FsblHookBeforeHandoff_Custom
SoM: TE0720-03-1C F SC REV:05
MAC: 80 1F 12 E0 8A 3B
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U-Boot 2020.01 (Oct 11 2021 - 18:58:51 +0000)
CPU: Zynq 7z020
Silicon: v3.1
DRAM: ECC disabled 1 GiB
Flash: 0 Bytes
NAND: 0 MiB
MMC: mmc@e0100000: 0, mmc@e0101000: 1
In: serial@e0000000
Out: serial@e0000000
Err: serial@e0000000
Net:
ZYNQ GEM: e000b000, mdio bus e000b000, phyaddr 0, interface rgmii-id
Warning: ethernet@e000b000 using MAC address from DT