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ZynqBerryTE0726 axi-reg32 ip in zynqberrydemo3

Started by p.ching.kuang@gmail.com, September 10, 2021, 03:05:19 AM

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p.ching.kuang@gmail.com

Dear,
The synthesis will failed by w/o axi_lib when I tried to re-package axi-reg32 ip.
Where could I got the axi_lib vhdl source code ?
Or any partial vhdl source for only could synthesis the axi_reg32 pass?
Thank you.

JH

Hi,
ip is included into this demo design:
\ip_lib\axi_reg32_1.0
br
John