Author Topic: SI5338A Clock Generation problem  (Read 433 times)

Rajkumar

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SI5338A Clock Generation problem
« on: November 27, 2020, 02:48:41 PM »
Hello Trenz Electronics Forum!

We bought two Trenz MPSoC modules of TE0820-03-4DE21FA, TE0820-03-2AI21FA with the carrier boards TEF1002-02, TE0705-04 respectively. First, we started with the TE0820-03-2AI21FA module, loaded the 'Boot.bin' located at 'test_board\prebuilt\boot_images\2cg_1i_2gb\hello_te0820' and 'zynqmp_fsbl_flash.elf' located at 'test_board\prebuilt\software\2cg_1i_2gb' in Flash memory. We are perfectly able to observe the 200MHz frequency from PL and Hello Trenz Module from PS as output. Next, we started with the TE0820-03-4DE21FA module, followed the same procedure as used in the earlier module. But, we are unable to observe the clock frequency i.e. it is varying, and observed the Hello Trenz Module output from PS. What is the solution for this issue?

And some other questions are,
 1. What is the difference between 'zynqmp_fsbl.elf', 'zynqmp_fsbl_flash.elf', and 'zynqmp_pmufw.elf' files?
 2. How to create a new FSBL file?
 3. Can we load the 'zynqmp_fsbl_flash.elf' file with our application's MCS or BIN file?
 4. How to specifically program the PLL?

I am looking forward to your reply and other suggestions if any.

Thanks!

JH

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Re: SI5338A Clock Generation problem
« Reply #1 on: November 30, 2020, 07:26:05 PM »
Hi,

Quote
1. What is the difference between 'zynqmp_fsbl.elf', 'zynqmp_fsbl_flash.elf', and 'zynqmp_pmufw.elf' files?

zynqmp_fsbl.elf: generated FSBL for boot.bin
zynqmp_fsbl_flash.elf: special FSBL to program QSPI FLash without changing boot mode to JTAG
zynqmp_pmufw.elf: PMU Firmware, need for Linux application, see reference to Userguides of ZynqMP from Xilinx: https://wiki.trenz-electronic.de/display/PD/Xilinx+Development+Tools#XilinxDevelopmentTools-ExcerptofXilinxUserGuides
bl31.elf: ATF Firmware , need for Linux application, see reference to  Userguides of ZynqMP from Xilinx: https://wiki.trenz-electronic.de/display/PD/Xilinx+Development+Tools#XilinxDevelopmentTools-ExcerptofXilinxUserGuides
Quote
  2. How to create a new FSBL file?
With Vitis or petalinux: https://wiki.trenz-electronic.de/display/PD/Vitis
Quote
  3. Can we load the 'zynqmp_fsbl_flash.elf' file with our application's MCS or BIN file?
ZynqMP need .bin formate.  .mcs is for native FPGA
'zynqmp_fsbl_flash.elf is only for Programming GUI of VIvado, in case boot mode is not JTAG
Quote
  4. How to specifically program the PLL?
Over FSBL. Our reference design includes source code with our changes
https://wiki.trenz-electronic.de/display/PD/TE0820+Test+Board#TE0820TestBoard-Application
you can load it as local repo into Vitis: https://wiki.trenz-electronic.de/display/PD/Vitis


br
John