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MAX1000 Project Top Schematic (.bdf) Examples?

Started by jaritter, July 04, 2020, 10:01:43 PM

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The example files in the MAX1000 distribution are all based on VHDL top level files.  I normally start a project with an Altera schematic (.bdf) file as I find it easier to organize and connect various sub-blocks that way.  Can anyone provide an example MAX1000 project, with pin assignments, that uses an Altera schematic (.bdf) file as the top level of the hierarchy?  An Altera archive (.qar) file would be perfect.



Thomas D

we offer reference designs with a .bdf file as top-level file.
You can download the newest design (Quartus Prime Lite 19.1 needed) from here:
The reference design is not a .quar file, but it is easy to generate the reference design, do following steps:

  • extract the .zip file
  • open 'create_project_win.cmd (Win OS) or (Linux OS)
  • select your board from the device list
  • click on 'Create_project' button

You also can create an 'empty' project with predefined pin assignments, but there is the top-level entity a .v file. You must manually change the top-level entity to a .bdf file.
To create an empty project do following steps:

  • open 'create_project_win.cmd (Win OS) or (Linux OS)
  • select your board from the device list
  • click on File -> New ... -> Quartus project in the menubar
  • enter the project name and select the project directory
  • select 'add predefined pin assignments'
  • click on 'Create' button