Hi,
The VHDL language is too opaque to understand for me ,
I want to use vivado to simulate the IP core in the folder IIot-EDDP/HLS/ARTY_Z7_FULL/ip_lib/ axis_pwm_1.0/hdl ,but I don't konw how to start and which document I
should read .
Is anyone can give me the Necessary steps to simulate aix_pwm_1.0 IP core using vivado ?
regards