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TE0820-02 Phy Linux Driver

Started by ignacio.moreno, January 10, 2018, 08:45:27 AM

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ignacio.moreno

Hi all,

i installed Linux in a board with the module te0820-02 and routed the LED signals of the phy to leds on the board. While U-Boot runs, the leds blink normally, but when Linux loads the driver, they totally stop (even though the networking works). The kernel is loading the driver for Marvell 88E1510:

[    2.257558] Marvell 88E1510 ff0e0000.etherne:01: attached PHY driver [Marvell 88E1510] (mii_bus:phy_addr=ff0e0000.etherne:01, irq=-1)

But the phy at the module is the 8E1512. My device tree for ethernet look like this:

ethernet@ff0e0000 {
                        compatible = "cdns,zynqmp-gem";
                        status = "okay";
                        interrupt-parent = <0x4>;
                        interrupts = <0x0 0x3f 0x4 0x0 0x3f 0x4>;
                        reg = <0x0 0xff0e0000 0x0 0x1000>;
                        clock-names = "pclk", "hclk", "tx_clk", "rx_clk";
                        #address-cells = <0x1>;
                        #size-cells = <0x0>;
                        #stream-id-cells = <0x1>;
                        iommus = <0xe 0x877>;
                        power-domains = <0x16>;
                        clocks = <0x3 0x1f 0x3 0x34 0x3 0x30 0x3 0x34>;
                        phy-mode = "rgmii-id";
                        xlnx,ptp-enet-clock = <0x0>;
                        local-mac-address = [00 0a 35 00 22 01];
                        phy-handle = <&ethPhy>;
                        ethPhy:phy@1{
                                reg = <0x1>;
                                ti,rx-internal-delay = <0x8>;
                                ti,tx-internal-delay = <0xa>;
                                ti,fifo-depth = <0x1>;
                                ti,rxctrl-strap-worka;
                        };

                };


Is there any option on the device tree missing, or any configuration, in order to set the LEDs blinking?

Thanks a lot in advance,
Ignacio


Oleksandr Kiyenko

Hi Ignacio,

looks like Linux PHY driver rewrite PHY registers which control LEDs. You can solve it using
marvell,reg-init = <....>;
in device tree. Where .... should be replaced to "bank register value" sets.
Marvell PHY documentation is under NDA, so we can't post it here.
You can try to use
marvell,reg-init = <3 16 0xff00 0x1e 3 17 0xfff0 0x00>;


Best regards
Oleksandr Kiyenko

ignacio.moreno

Hi Oleksandr,

thanks! It works! But just partially: the LED1 is not blinking or working at all. According to the schematic, this signal comes from the PHY, goes to the CPLD (PHY_LED1) and comes out through the pin X0, which is connected to the pin H1 of the FPGA. But unfortunatelly, there is no input on the pin H1 of the FPGA (i measured it with an ILA). Does something must be done, in order  to get the signal as output on X0?

Thanks and Regards
Ignacio

JH

Hi,

sorry there is a mist in the description
PHY1 is X1 (J1) instead X0 (H1)
We have a reference design:
On the picture you see the activity on X1, which is wrong named as FIRMWARE ID.
So with current Firmware X0 is Firmware ID and X1 PHY LED. This works also with petalinux.
I will fix CPLD description and reference design description with 16.4 update.
br
John





ignacio.moreno

Hi John,

thanks for the info! Now the second LED is also working!

Thank you both for your quick answers!!

Regards
Ignacio