SD Ram Controller for MAX100

[steveg]

Hello - how do I create a controller for the 8MB SDRAM on the MAX1000 using Quartus?
Thank you
Steve

[jefflieu]

Hello,
Have you tried creating a system in Qsys? Then read/write your SDRAM controller via Avalon interface. I think you can then export the Avalon port out of Qsys.

[steveg]

Hi - I have not yet purchased a MAX1000 but I would like to purchase many. But for my application  - a camera - I will need the SDRAM. I think it can be difficult to get all the timings right so i was hoping a SD Ram controller had already been developed!
Thanks!

[jefflieu]

You can configure the SDRAM controller timing parameter in the Qsys (see attachment)
I was thinking of creating an example that includes SDRAM with MAX1000 board but not had time to do it yet.
If you'd need something to start with, follow the link in my other post.

[patk]

How did you setup the SDRAM clock to the W9864G6 chip on the max1000? I added another clock output from the MAX10 PLL to the external pin shown on the user guide, but it doesn't seem to be working.

[patk]

Looking at the startup initialization requirements for the W9864 SDRAM and the standard Intel SDRAM controller core operation there looks to be an incompatibility. Was this the FPGA core used to test the interface?

[jefflieu]

Have you got it working?
I think I've got it working here.
https://github.com/jefflieu/recon/tree/recon_2/dev/hw
The IO of the MAX10 device can't run beyond 50MHz in single ended mode.