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Author Topic: Errors in Gigabee TE0600-01 Schematic  (Read 5680 times)

RDT2

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Errors in Gigabee TE0600-01 Schematic
« on: October 03, 2011, 07:20:08 PM »
I was looking at the FPGA Pin to board names on the schematic and noticed that a couple of the signals seem to be swapped.

Pin C5 is IO_L2P_0 on the FPGA but was given a signal name of B2B_B0_L2_N
While Pin A5 should be _N but was given a name of _P.

The same goes for Pins A20 and A21.

So my question is which FPGA pin is actually routed to which B2B pin on J1/J2.

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Thorsten Trenz

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Re: Errors in Gigabee TE0600-01 Schematic
« Reply #1 on: October 03, 2011, 07:57:51 PM »
Hi,
it seems, they were swapped during routing, and forgot to cleanup. The labeling of the FPGA Symbol is correct, and the netlabels need to be corrected. We will update the schematic soon.

best regards
Thorsten Trenz

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Thorsten Trenz

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Re: Errors in Gigabee TE0600-01 Schematic
« Reply #2 on: October 04, 2011, 02:21:51 PM »
Hi,
corrected schematics are now online.
http://docs.trenz-electronic.de/Trenz_Electronic/products/TE0600-GigaBee_series/TE0600/documents/

best regards
Thorsten Trenz

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fpgaengineer

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Re: Errors in Gigabee TE0600-01 Schematic
« Reply #3 on: February 02, 2012, 12:56:05 AM »
is that link working?
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Thorsten Trenz

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Re: Errors in Gigabee TE0600-01 Schematic
« Reply #4 on: February 02, 2012, 08:47:13 AM »
Hi,
we are currently restructuring our documents. They are now integrated in our homepage download area.
The new link is: http://www.trenz-electronic.de/download/d0/Trenz_Electronic/d1/TE0600-GigaBee_series/d2/TE0600/d3/documents.html

best regards
Thorsten Trenz


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