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#11
Trenz Electronic FPGA Modules / TE0712 SYSLEDs pattern
Last post by airin - July 03, 2026, 09:09:29 AMI am working with the TE0712-03 comercial board mounted in the TE0706-04. I have just connected the power suppply and the SYSLEDs at TE0712-03 started blinking with a pattern.
They always blink the same way, but I am not sure what the blinking pattern i have means., related to the board manual.
It starts twice blink the green, then twice blink red&green. This is repeated 5 times and then the green led stops blinking but the red led remains blinking same frequency.
I saw on the TE0712 manual that the blinking pattern should be the same for both leds, at least it is what I undertood from the chart in the manual, but I am not seeing this pattern so,
I don't know if I am wrong with my understanding of the blinking pattern from the manual or the board blinking pattern is correct but the manual does not specify every detai because it is not so important.
I would like to know if there is any manual, somewhere, with extra and detailed information about this and if the blinking pattern I have is correct even if it does'nt match the manual exactly.
They always blink the same way, but I am not sure what the blinking pattern i have means., related to the board manual.
It starts twice blink the green, then twice blink red&green. This is repeated 5 times and then the green led stops blinking but the red led remains blinking same frequency.
I saw on the TE0712 manual that the blinking pattern should be the same for both leds, at least it is what I undertood from the chart in the manual, but I am not seeing this pattern so,
I don't know if I am wrong with my understanding of the blinking pattern from the manual or the board blinking pattern is correct but the manual does not specify every detai because it is not so important.
I would like to know if there is any manual, somewhere, with extra and detailed information about this and if the blinking pattern I have is correct even if it does'nt match the manual exactly.
#12
Trenz Electronic FPGA Modules / Re: DDR Memory Size Detected I...
Last post by MA - July 01, 2026, 09:41:51 AMHi,
The DDR configuration for the ZynqMP is defined in the PS Configuration in Vivado.
Which module board are you using? Also, could you please share a boot log with us? That would help us investigate the issue.
br
The DDR configuration for the ZynqMP is defined in the PS Configuration in Vivado.
Which module board are you using? Also, could you please share a boot log with us? That would help us investigate the issue.
br
#13
Trenz Electronic FPGA Modules / 4×5 SoM with Zynq UltraScale+ ...
Last post by nadir.b - June 30, 2026, 03:14:52 PMHi,
I'm scoping a future White Rabbit node and need a 4×5 SoM that provides both of the following in one module:
1. A Zynq UltraScale+ MPSoC (I need the PS), and
2. One PL GTH transceiver lane routed out to the B2B connector.
Questions:
- On the Zynq US+ 4×5 modules (e.g. TE0820), are the PL GTH lanes ever brought to the B2B, or are they grounded/unconnected on all variants? (My reading of the EV-variant pinout suggests grounded, can you confirm?)
- Does any current or planned Trenz module meet both requirements above?
Many thanks!
nadir.b
I'm scoping a future White Rabbit node and need a 4×5 SoM that provides both of the following in one module:
1. A Zynq UltraScale+ MPSoC (I need the PS), and
2. One PL GTH transceiver lane routed out to the B2B connector.
Questions:
- On the Zynq US+ 4×5 modules (e.g. TE0820), are the PL GTH lanes ever brought to the B2B, or are they grounded/unconnected on all variants? (My reading of the EV-variant pinout suggests grounded, can you confirm?)
- Does any current or planned Trenz module meet both requirements above?
Many thanks!
nadir.b
#14
Trenz Electronic FPGA Modules / Re: DDR Memory Size Detected I...
Last post by danigomez - June 29, 2026, 10:07:12 AMI have already tested with a freshly generated device tree and rebuilt both U-Boot and PetaLinux from scratch. The issue persists, so I'm starting to suspect either a DDR configuration mismatch in the exported hardware design or a change in the Vivado-generated platform files. Any suggestions on what else to check would be greatly appreciated.
#15
Trenz Electronic FPGA Modules / DDR Memory Size Detected Incor...
Last post by danigomez - June 29, 2026, 10:04:12 AMHi everyone,
I'm working with a Trenz Zynq UltraScale+ module and recently updated my Vivado project from 2023.2 to 2024.1. The hardware design itself is relatively simple and builds without any errors, but after exporting the XSA and rebuilding PetaLinux, Linux only detects 2 GB of RAM even though the module has 4 GB installed.
The previous image built with the older Vivado version correctly reported the full memory size. I compared the hardware handoff files and device tree output but haven't found anything obvious. U-Boot also appears to show the reduced memory size before Linux starts, which makes me think the issue originates earlier in the boot process.
Has anyone seen memory size detection change after a Vivado upgrade? I'm particularly interested in whether there are DDR configuration settings or generated files that need to be reviewed when moving projects between Vivado versions.
I'm working with a Trenz Zynq UltraScale+ module and recently updated my Vivado project from 2023.2 to 2024.1. The hardware design itself is relatively simple and builds without any errors, but after exporting the XSA and rebuilding PetaLinux, Linux only detects 2 GB of RAM even though the module has 4 GB installed.
The previous image built with the older Vivado version correctly reported the full memory size. I compared the hardware handoff files and device tree output but haven't found anything obvious. U-Boot also appears to show the reduced memory size before Linux starts, which makes me think the issue originates earlier in the boot process.
Has anyone seen memory size detection change after a Vivado upgrade? I'm particularly interested in whether there are DDR configuration settings or generated files that need to be reviewed when moving projects between Vivado versions.
#16
UltraScale / Re: TE0802 - Modern setup
Last post by jsolmen - June 27, 2026, 12:07:21 AMThanks, Manuela, I will follow your advice.
#17
Trenz Electronic FPGA Modules / Re: My TE0720-04-61C33MAS Star...
Last post by MA - June 24, 2026, 01:41:12 PMHi,
Yes, unfortunately you are correct. SDXC cards are not supported by the Zynq devices.
Could you please send an email to our support team with the module serial number? This will help us identify the exact hardware revision and provide further assistance.
Email: support@trenz-electronic.de
Thanks and best regards,
Manuela
Yes, unfortunately you are correct. SDXC cards are not supported by the Zynq devices.
Could you please send an email to our support team with the module serial number? This will help us identify the exact hardware revision and provide further assistance.
Email: support@trenz-electronic.de
Thanks and best regards,
Manuela
#18
UltraScale / Re: TE0802 - Modern setup
Last post by MA - June 24, 2026, 01:04:21 PMHi Juan,
we are currently in the process of updating the design to Vivado version 2025.2.
If you would like to evaluate it in advance, please send an email to our support team and we can provide you with a preliminary version of the design.
- support@trenz-electronic.de
Best regards,
Manuela
we are currently in the process of updating the design to Vivado version 2025.2.
If you would like to evaluate it in advance, please send an email to our support team and we can provide you with a preliminary version of the design.
- support@trenz-electronic.de
Best regards,
Manuela
#19
Trenz Electronic FPGA Modules / My TE0720-04-61C33MAS Starter ...
Last post by DrFluteDos - June 22, 2026, 04:58:09 PMI've successfully booted my TE0720 using an 8G SD card that I last used in a ZedBoard ... just overwriting the boot partition with files from the TE0720 prebuilt reference design.
However, my attempts to use the 64G SDXC card that came with the kit have all failed! According to "Search Assist" the Zynq can't boot from one (see image). Is this correct?
Kind regards
DrFluteDos
However, my attempts to use the 64G SDXC card that came with the kit have all failed! According to "Search Assist" the Zynq can't boot from one (see image). Is this correct?
Kind regards
DrFluteDos
#20
Trenz Electronic FPGA Modules / Re: TE0817-02 — PL logic inter...
Last post by Martin R @Trenz - June 18, 2026, 01:31:24 PMHi Randy,
up to now we are not aware of any hardware issue on TE0817-02 modules.
There are no changes on the board not captured in public available PCN.
To get a more detailed view on the problem, can you please send us the build logs of problematic designs with all warning/error outputs enabled.
Some questions:
Do you utilize the VCU?
Are there any unconstrained path in your design?
Are all timing constraints met?
Can you further send us the Serial numbers (Number on square white QR Sticker) of affected REV02 boards and serial number of your REV01 board used for comparisons.
Please send all together to our support: support@trenz-electronic.de
best regards
Martin
up to now we are not aware of any hardware issue on TE0817-02 modules.
There are no changes on the board not captured in public available PCN.
To get a more detailed view on the problem, can you please send us the build logs of problematic designs with all warning/error outputs enabled.
Some questions:
Do you utilize the VCU?
Are there any unconstrained path in your design?
Are all timing constraints met?
Can you further send us the Serial numbers (Number on square white QR Sticker) of affected REV02 boards and serial number of your REV01 board used for comparisons.
Please send all together to our support: support@trenz-electronic.de
best regards
Martin