Print Page - Using UART1 on TE0715 Module

Title: Using UART1 on TE0715 Module
Post by: rouben_s on March 27, 2017, 06:04:24 PM

Hi there,

On the TE0715 module the UART0 is enabled by default but in my application I want to use the UART1 and not UART0(disable) with MIO pins 12 and 13. Is there any additional steps besides checking the UART1 option in the MIO configuration of the Zynq SOC in Vivado and choosing MIO 12..13 to make the change between UART0 and UART1?

Title: Re: Using UART1 on TE0715 Module
Post by: Oleksandr Kiyenko on March 28, 2017, 08:07:44 AM

Hi Rouben,

After that you have to rebuild project and rebuild FSBL. If you use baremetal software you need to check BSP settings to be sure that stdin and stdout is set to right UART and rebuild BSP if needed.
If you use linux check device tree for correct console and UART settings. Do it in "petalinux-config", but also check system-top.dts.

Best regards
Oleksandr Kiyenko

Title: Re: Using UART1 on TE0715 Module
Post by: rouben_s on March 29, 2017, 11:39:20 PM

Thank you for the response.

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Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: rouben_s on March 27, 2017, 06:04:24 PM