Hi-
On your site I find only this document: PO-TE0720-01-tracelengths.XLS.
Can I assume that the trace lengths on the TE0720-03-1CF are exactly the same as those?
Thanks,
Dan
correct
Great! And can I also assume that ALL differential pairs that appear on the connectors are routed on the TE0720-03-1CF with a 100 ohm impedance and sufficient signal integrity to allow them to be run at the full spec that the Zynq supports? Any pairs that should be avoided?
This is harder to answer, as good as it gets, yes, 100 ohm yes, but the routing for diff pairs is not 100% optimal, we do as much as possible for SI. There are no extra layer changes on any lane, so either 1 or 2 vias per connection.
artix max IO speeds are 1.25Gbit for input, and up to 1.4Gbit on output.
So if you ask if we have tested all diff lanes receiving at the same time 1.25gbit with agressive PRBS, or if we have run all diff pairs at 1.4Gbit output at same time, then answer is no, we have not.
There are no pairs known to be AVOID, well if you have some very high speed lines, you can just select some that have smaller rouing length on the module.
Where IS
PO-TE0720-01-tracelengths.XLS
??? I cannot find it
Does it have # of VIAS in it ?
I have some 750 Mbps pairs to run (4 pairs + clock + frame)
glen
Hi,
you found trace length for te0720-01 now on:
- https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/TE0720/REV01/HW_Design
For revision 02 and 03 they will be available in appr. 1h on:
- https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/TE0720/REV02/HW_Design
- https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/TE0720/REV03/HW_Design
Length if vias is included, but not package length of fpga device.
br
John
Thank you very much
I am new to the site and it is taking time to understand where items are put
with thanks
glen