Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: Woody242 on July 16, 2015, 04:00:12 AM

Title: TE0720 / TE0703 Reference Design
Post by: Woody242 on July 16, 2015, 04:00:12 AM
Greetings,

Is there a reference design or at least a block diagram on how to configure the PS for Vivado 2014.4 for the TE0720 with the TE0703 carrier card.  Mainly looking for hooking up the System controller.  I have a simple module setup with QSPI/SD/UART that works now I want to build a full system that I can run petalinux with Ethernet and network support.  I think I need the SC to get the mac address.

Thanks,
Woody
Title: Re: TE0720 / TE0703 Reference Design
Post by: Woody242 on July 16, 2015, 04:57:28 AM
Status Update,

I have enabled Ethernet 0 and I2C1 in my project, added the SC interface IP clock and connected I2C1 of the processor system to the System Controller.  I think this is correct.  Unfortunately, my FSBL is indicating 0 for SC revision and 0 for all the fields of the MAC address.  It also returns a status of 1, Failure.

Any ideas?

Thanks,
Woody
Title: Re: TE0720 / TE0703 Reference Design
Post by: Woody242 on July 16, 2015, 05:14:30 AM
Ok so I think the problem is that I have not hooked up the SC logic to the outside world.  Question, are the pin constraints the same as that for the 701 module for connecting to the SC? 

Thanks,
Woody
Title: Re: TE0720 / TE0703 Reference Design
Post by: Antti Lukats on July 17, 2015, 12:45:17 PM
the system controller in on TE0720, and has nothing to-do with any baseboard at all.
Title: Re: TE0720 / TE0703 Reference Design
Post by: Woody242 on July 17, 2015, 03:27:24 PM
Thanks up and running, after looking at the vhf file for the SC ip it made more sense.  i also needed to enable the MDIO pins for the Ethernet.  Now my FSBL gets the SC revision and I get a good MAC address.   Just finished building petalinux for the board.  The only change I made was to turn off randomization of the MAC addr since that is supplied.