The Gigabee module has a watchdog IC on it (TPS3705-33). When there is no transition on the WDI signal it is not supposed to cause a reset, according to the datasheet.
When we try to program the SPI flash using impact using indirect SPI programming, halfway through the programming sequence, the FPGA resets and programming fails. When we disconnect WDI input to the IC, we no longer have this problem. The only explanation we could come up with is that the FPGA pin driving WDI is not tri-stated at some point during SPI flash programming. Is indirect programming expected to fail like this, or is there something else wrong with our setup? We tried ISE 14.4 through 14.7, if it matters.
Hello,
Watchdog function in TPS3705 can cause reset only if you have R3 resistor mounted on your board (normally this resistor is not mounted).
We didn't hear about such problems during SPI programming before. Only suggestion is that power supply is not stable for some reason during this programming.
Did you check WDO pin behaviour during SPI programming ?
Best regards
Oleksandr Kiyenko