I have a bare metal application running on a SoM TE0720 that pushes messages out to both PS uarts and also to PL axilite uart. I can receive these messages on my development PC from PS uart0, and PL axilite uart, but not PS uart1. According to the TE0703 carrier TRM (see attached image), the SoM uart1 Tx and Rx lines (nets MIO12, MIO13) pass through the carrier CPLD and onto the VG96 connector (nets X16 and X17). However, there is a suggestion that this is CPLD firmware dependent. I've download the CPLD source code and it seems fine. However, I can't tell what version of CPLD code is actually currently running.
Can you help please.
Kind regards
2026-11-02 10_36_07-TRM-TE0703 TRM-v.45 -03_21_2024 - DuckDuckGo.png