Hello,
I am experiencing a PCIe Link Up failure when connecting an M.2 Key-E WiFi module (SX-PCEBE-M2, Qualcomm QCC2076 chipset) to the TE0813 + TEBF0818 board via an M.2 Key-E to PCIe x16 slot adapter card.
=== Environment ===
- Module: Trenz TE0813 (Zynq UltraScale+ ZU3EG) + TEBF0818
- PCIe Controller: Xilinx NWL PCIe (PS-PCIe)
- OS: PetaLinux 2023.2 (Linux Kernel 6.1.30-xilinx)
- Connection: M.2 Key-E WiFi module via PCIe x16 slot adapter card
=== Verified OK ===
- 3.3V power supply: Normal
- PERST0_L (Pin 52): 1.8V confirmed
- REFCLK 100MHz: Normal output confirmed
- TX/RX signal direction: Correct
- W_DISABLE pins: Normal
- Reserved pins: All Open (NC)
=== Symptom ===
dmesg output:
nwl-pcie fd0e0000.pcie: Link is DOWN
PS_LINKUP Register (0xFD480238):
BIT(1) PHY_RDY_LINKUP = 1 → PHY is UP
BIT(0) PCIE_PHY_LINKUP = 0 → PCIe Link Training NOT completed
BIT(0) remains 0 even after waiting 2+ seconds
=== Key Observation ===
- WNFQ-268AXI module (Qualcomm WCN6856 chipset) works fine in the exact same environment
- SX-PCEAX module (older Qualcomm-based) also fails with identical symptoms on the same board
- This suggests a compatibility issue between the Xilinx NWL PCIe controller and Qualcomm-based WiFi modules in general
=== What I have tried ===
- Added wait loop in nwl_wait_for_link() → No effect
- Forced PEWAKE to GND → No effect
- Forced PCIe Gen1 speed → No effect
- PCIe controller reset via 0xFD1A0100 → No effect
- CMA size increased to 512MB → No effect
=== Question ===
Has anyone successfully used a Qualcomm-based M.2 WiFi module with TE0813 + TEBF0818 and the NWL PCIe controller?
Is there any known configuration, FSBL setting, or kernel patch required to make PCIe Link Training work with Qualcomm chipsets on the NWL PCIe controller?
Any advice would be greatly appreciated.
Thank you.