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Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: guirenaud on September 24, 2025, 03:28:21 PM

Title: [TEI0006-04-API23A]: LVDS CLK1 connected or not to J3 connector
Post by: guirenaud on September 24, 2025, 03:28:21 PM
Hello

Looking to the schematics of the TEI0006-04-API23A Rev.4 (page 8) i'm not sure if the LVDS clock named CLK1_P/N (pins 17 and 19 of the schematics) are connected or not.
Could you confirm that ?

Best regards
Title: Re: [TEI0006-04-API23A]: LVDS CLK1 connected or not to J3 connector
Post by: Thomas D on September 26, 2025, 08:20:25 AM
Hi
the CLK1_N and CLK1_P pins of the Si5345 are connected to J3-17 and J3-19 on the TEI0006-04-API23A.

br
Thomas
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