Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: PaulChang on July 28, 2025, 04:08:33 PM

Title: About TE0835
Post by: PaulChang on July 28, 2025, 04:08:33 PM
Dear Sir,

I tested MTS design of TE0835.
ADC Tile3 Q part seems has strange signal.(Only the front part)
Other ADC chaneels Q part are ok.
Please see attach files. (4.png:No DAC Channels connected,Just recevie signals)

Best Regards,
Paul
Title: Re: About TE0835
Post by: M Kirberg on July 29, 2025, 02:31:48 PM
Hi,

which device (ZUXX) do you have?

Do you have the log of synchronization?

Is this error static or does it change?

This could be caused by insufficient Address Space (Size) of the Data Caputure core in the design, can you check how big it is?
Title: Re: About TE0835
Post by: PaulChang on July 30, 2025, 05:50:49 AM
Hi Kirberg,

It is TE0835-*-MXE21-A (4GB DDR). *SPRT PCB: REV02 (xczu25dr-ffve1156-1-e).
How to find the log of synchronization? (Does it in RF Analyzer data terminal?Just like rec.txt)

If recevie samples are same and result seems staic. (Test without cable and no DAC output)
I have changed the recevie samples to 6300 and 4096 and the results are different.
Please see attach files.(6300.png & 4096.png)

About Address Space (Size) of the Data Caputure core in the design.
Do you mean the Vivado design? It is pre-build bit files.
Do I need to modify it?
The Bit file is from \mts_design\prebuilt\hardware\25dr_1e_4gb\mts_design_25dr_1e_4gb.bit

Best Regards,
Paul
Title: Re: About TE0835
Post by: mch on July 31, 2025, 08:20:50 PM
Hi Paul,

In the "mts_design" project, we configured the DAC output data as real, and the ADC output data in I/Q format. The Q signal represents the imaginary part and can be proportional to the phase of the input signal. Since the sine waves generated by the DACs have no phase shift, the Q signal remains zero.

The Q signal will become non-zero only if either the DAC is configured to output complex signals (I and Q) using two DAC channels, or a signal with an actual phase shift is generated, introducing a Q component.

If you refer to the project documentation, you'll see that the Q signals were not selected because the Q signals are zero in this case:

https://wiki.trenz-electronic.de/display/PD/TE0835+Multi-Tile+Synchronization+Design#TE0835MultiTileSynchronizationDesign-Multi-TileSynchronizationApplication

If you want to test the mts design on your hardware , please route all DACs outputs back to the ADCs inputs. To synchronise the tiles, run the application "mts_linux_sync_gen1" in the Linux console.

Best regards,

Mohsen Chamanbaz 
Title: Re: About TE0835
Post by: PaulChang on August 01, 2025, 06:01:45 AM
Hi mch,

Only ADCTile3 23 Q has strange signal. Others Q part are zero.
I would like to know it is hardware or design issue. Or It's normal situation.


Best Regards,
Paul
Title: Re: About TE0835
Post by: mch on August 01, 2025, 08:51:47 AM
Hi Paul,
you could check the related DAC output with oscilloscope , if the DAC generate the signal correctly. What does the frequency domain spectrum of the ADC tile3 23 and its related DAC look like?

You can test our other reference design to check this tile. You find this project in the following link:

https://wiki.trenz-electronic.de/display/PD/TE0835+Reference+Design
https://www.trenz-electronic.de/Downloads/?path=Trenz_Electronic/Modules_and_Module_Carriers/6.5x9/TE0835/Reference_Design/2023.2/test_board

Best regards,

Mohsen Chamanbaz
Title: Re: About TE0835
Post by: PaulChang on August 04, 2025, 04:37:34 AM
Hi mch,

I have tested TE0835+Reference+Design design.
Please see the attached file.

Best Regards,
Paul
Title: Re: About TE0835
Post by: mch on August 04, 2025, 12:38:05 PM
Hello Paul,

please try to activate the loop option for the ADC. It can be a transient glitch for Q signal. I mean, if this glitch remains on the signal after activating the loop of the acquiring of ADC or is a transient state?  I have checked the TE0835-03-MEX81-A (xczu25dr) with the TE0835 reference design project. I have no glitch for Q signal. In the attachment you find the ADC and DAC spectrum and signals.

Best regards,

Mohsen Chamanbaz
Title: Re: About TE0835
Post by: PaulChang on August 05, 2025, 05:17:34 PM
Hi Mch,

This glitch remains on the signal after activating the loop of the acquiring of ADC.
Please see attached file.


Best Regards,
Paul
Title: Re: About TE0835
Post by: mch on August 06, 2025, 10:50:48 AM
Hi Paul,

Please folow these instructions:

1. Change your feedback cable and try again. I would be better to use an SMP-SMP cable instead of two cables and adapter.
2. Try to connect other DAC channel same as DAC7 to the ADC7 and try again.
3. Set the frequency higher, e.g., to 200MHz, and try a again.
4. Please send me the FFT spectrum for all ADCs as shown in the attached photo for both frequencies 10MHz and 200MH. In this case, you should feedback all DACs to the ADCs.

Best regards,

Mohsen Chamanbaz
Title: Re: About TE0835
Post by: PaulChang on August 06, 2025, 04:28:21 PM
Hi Mch,

Please see attached file.

Best Regards,
Paul
Title: Re: About TE0835
Post by: mch on August 07, 2025, 10:34:19 AM
Hi Paul,

Please send a summary of your problem to the following email address:

support@trenz-electronic.de

Please do not forget to write the serial numbers of the module and the carrier board. The serial number is a 6-digit number on the white label on the module and the carrier board.

Best regards,

Mohsen Chamanbaz