Hi,
I am currently developing hardware to support the TE0813 SoM module and am referring to both the TE0813 Technical Reference Manual (TRM) and the TEBF0818 development kit. However, I've noticed that the two documents describe different power supply methods.
The TRM specifies individual input rails such as LP_DCDC, 3V3IN, etc., with their respective current requirements. In contrast, the development kit appears to supply a common 3.3V/5A rail for all power inputs.
Could you please confirm whether the development kit provides sufficient power to the SoM module under all operating conditions? I want to ensure there are no supply limitations in our custom hardware design.
Best regards,
Rudraksh
Hello Rudraksh,
Thank you for your message and for your thorough review of both the TE0813 TRM and the TEBF0818 development kit documentation.
You're correct in observing that the TRM outlines individual power rails (e.g., LP_DCDC, 3V3IN, etc.) with their respective current requirements, while the TEBF0818 development kit simplifies this by supplying a common 3.3V/5A power rail. This shared rail is designed to meet the typical power demands of the TE0813 SoM under standard operating conditions when used with the development board.
However, for custom hardware designs — especially those with bigger FPGA, core ount, higher FPGA utilisation, design frequency, VCU presence, or extended temperature operation — it's important to analyze the total power requirements of the SoM and connected components with AMD Xilinx Power estimator. While the 3.3V/5A rail generally provides sufficient power for most applications, we recommend reviewing the worst-case power consumption provided in the TRM and comparing them against your system's expected load to ensure robust power delivery.
If your application exceeds the typical power budget, it may be advisable to consider separate power domains or provide higher current capabilities per rail to ensure stability under all operating conditions.
In future revisions of the TEBF08x8 boards, we plan to update the power supply scheme to provide bigger flexibility and enable testing of a wider range of high-demand applications.
Best Regards,
Vadim
Hello Vadim, Rudraksh,
Thank you for the question / answer I am also working on a similar project.
I am struggling to define the current consumption of the VCCO_25, VCCO_26 (3.3V) and VCCO_64, VCCO_65, VCCO_66 (1.8V).
Same question for the Vref_64, 65, 66 (in my case (1V)).
Thank you in advance.
Regards,
Guillaume
Hi Guillaume,
Please install Xilinx Power Design Manager.
https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/power-design-manager.html
You can find the total current for each and every supply pin.
Best Regards,
Rudraksh