Hello everyone
I currently have a problem with my TE0720-04 module. I am using the Reference Design Test-Board as a base for my project. The whole thing works without any problems. However, when I connect an AXI Interconnect to the ZYNQ PS, it no longer works. The error is that after U-Boot has loaded the kernel, it hangs at Starting Kernel . I am not sure if it is a UART problem or something else.
Some details:
-I am building with 2023.2 Vivado & Petalinux.
-I used the reference design test board with the only change that I added an AXI interconnect with
some with some AXI IP's.
-If I misconfigure the device tree, the boot process stops with: -->8 Cut Here, which
indicates to me that the UART is not working because of the cut off kernel panic.
-I have checked the bootargs which are consol=ttyPS0
-I have disabled UART 1 which is not used in my design.
-I have checked the device Tree
I'm not sure where the problem is coming from and I don't know how to solve it. Has anyone had the same problem or does anyone know what the problem could be?
Thank you very much
greetings Michael
Hello MIZI99,
could you show us the bootlog? Btw. what carrier are you using ?
Maybe your interrupt signals arent connected correctly? You could use that design as an example:https://wiki.trenz-electronic.de/display/PD/TE0720+HDMI701
Otherwise i would recommend to rebuild the reference design that already works with the prebuilt files(hence vivado xsa -> petalinux -> bootfiles) and if your build works, then implement your changes(maybe try adding one IP at a time).