Dear community,
We are currently working on a custom carrier board for a MPSoC Module with Xilinx Zynq UltraScale+ ZU7EV-1E (TRENZ board: TE0817-01-7DE21-A). We are booting Petalinux from the SD card, but the FPGA sometimes does not start up. As a result, not only PS_INIT_B is pulled low, but also there is no message shown in the UART terminal.
We have checked the following aspects so far:
- Schematics and layout of the custom carrier board
- Configuration of the mode pins (set to SD)
- Power-up sequence
- Configuration of the SD in PS side (Vivado project):
- Configuration of the SD in PS side (Vivado project: I/O peripheral) (https://drive.google.com/file/d/1-yjoc3OxaIkujMpk32MUTOgvdT57btZP/view?usp=sharing)
- Configuration of the SD in PS side (Vivado project: Peripheral Clock) (https://drive.google.com/file/d/16iX-0Hxyr9bf4QLzPa3TWspdJp7t3PY1/view?usp=sharing)
- Hardware configuration and device tree (Petalinux project):
- Hardware configuration (Petalinux project: Kernel Bootargs) (https://drive.google.com/file/d/1Jod4t3_eKcqFxGqKq20pO1uJTdvSVlyB/view?usp=sharing)
- Hardware configuration (Petalinux project: Image Packaging) (https://drive.google.com/file/d/1VBp3OghxLNEsmtxTE3ePyPfmYeqQhjii/view?usp=sharing)
- Device tree (Petalinux project) (https://drive.google.com/file/d/1ePIfyy95uiYl7SD_FaYimsAKU_IQ10ei/view?usp=sharing)
In addition, we have followed the guide (https://adaptivesupport.amd.com/s/article/Need-help-with-boot-debug-on-Zynq-Ultrascale-or-Versal?language=en_US) for debugging the FPGA boot. As a result, we observed: FPGA boot debug (https://drive.google.com/file/d/1KSuj8QgR8mymeyUyLenZFUqPDJnPCk8a/view?usp=sharing)
We would appreciate if someone could help us understand the reason behind this issue and a possible way to fix it.
Thanks in advance,