Print Page - TEI0022 DataStorm FPGA DDR3 memory design

Title: TEI0022 DataStorm FPGA DDR3 memory design
Post by: MR on September 06, 2024, 05:03:35 PM

I am trying to use the FPGA ddr3 memory and have not been able to find a reference design. I do not have a need for the HPS as I just want to use FMC pins, pmod, and the FPGA ddr3 memory.

I have created pinout constraints from schematic but looking for the correct memory parameters. An example design would be great to test out the board prior to design changes.

appreciate the assistance.

-Matt

Title: Re: TEI0022 DataStorm FPGA DDR3 memory design
Post by: JH on September 09, 2024, 10:04:40 AM

Hi,
reference design documentation and download:
https://wiki.trenz-electronic.de/display/PD/TEI0022+Test+Board
https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/Development_Boards/TEI0022/Reference_Design/21.1/test_board

br
John

Title: Re: TEI0022 DataStorm FPGA DDR3 memory design
Post by: MR on September 18, 2024, 12:14:10 AM

Thanks for the reply, but this design only has the HPS memory. I am looking for a design that utilizes the DDR3 attached to the non-HPS pins.

Thanks,
Matt

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Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: MR on September 06, 2024, 05:03:35 PM