Trenz Electronic GmbH Support Forum

Community => CYC1000 community projects => Topic started by: Subcritical on May 02, 2023, 10:31:31 AM

Title: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on May 02, 2023, 10:31:31 AM
Using the CYC1000 have been developed Firmwares, Useful Wrappers and Retro cores:

One of the latest retro-implementation is the PCXT, that probes that it is posible to port from MIST  & MiSTER fpgas, into CYC1000.
https://github.com/AtlasFPGA/PCXT_DeMiSTify

The port of Minimig AMIGA AGA 68020, Minimig-UnAMIGA is in development:
https://www.youtube.com/watch?v=lzdIqkl8nnc

In order to see a new firmware/core that use a microcontroller there is ALMA (Nowadays uses only BRAM at high speed over 400Mhz):
https://gitlab.com/fpga-boards/alma
https://gitlab.com/fpga-boards/alma-firmware

The proyect begin two years ago with some keyfeatures.
QPI -> Connexion bettewn SBC "Most of the time the choosen SBC, is a Rasberry PI"
4 Bit SD -> For future high speed implementations
Video digital with 4 diferential pairs -> VIDEO DIGITAL DVI WRAPPER most of the time (That means no sound in the DIGITAL-VIDEO).
USB Direct -> using the L1 & K1 in pull down, @Thesonders developped a wrapper compatible with unifying, it is an state machine for keyboards in boot mode.

For recreate a way to do implement new designs and old computers the board has:
DB9 ATARI JOYSTICK
EAR -> lo listen for old data stored y cassettees.
STEREO DELTASIGMA -> Maintain Deltasigma and PWM for their easy implementation of sound, an exercises.
VIDEO DIGITAL that could be transformed easily in VGA64 with an adaptor
2 PS2 -> The keyboard one has K2 & L2, and some cores uses nowadays USB unifiying from Logitech.

USB-DIRECT compatible with Unifiing wireless protocol:
https://github.com/TheSonders/USBKeyboard

We animate developers of the CYC1000, to Join if they are interested.
We also has a group in telegram only search por INICIATIVA ATLAS Spanish & English / ATLAS INITIATIVE for International group
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: antchairman on August 16, 2023, 09:37:31 AM
I will make an effort to take the initiative and investigate whether or not the requirements of the individuals may be satisfied by any of the software that is now available. In order to provide SDRAM with a clock, a phase-shifted PLL output and the pin associated with it have been introduced.
tunnel rush (https://tunnelrun.io/home)
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on November 24, 2023, 01:58:35 PM
This is an interactive bill of materials, nowadays the SD has 4bit mode and is not share with the 2x20 Raspberry pi port. But in the future i'm going to share the signals an put also in the 2x20 pi bus.
Nowadays also seeing the rp2040, to control the cores that were sintetized in the platform.

(https://github.com/AtlasFPGA/CYC1000/raw/main/FOTOS/Ultimo_prototipo_RP2040VIDEO.JPG)

More info available here:
https://github.com/AtlasFPGA/CYC1000
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on November 26, 2023, 05:12:49 PM
There are also a Minimig core in development, That suports AGA and uses the UnAMIGA branch.

https://youtu.be/8tbrBpbKonQ?si=m3qmASQROg6OqNrN
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on December 10, 2023, 03:10:48 PM
Here we can see the USBKeyboard in an 8bit VIC20 implementation:
https://github.com/TheSonders/USBKeyboard


https://www.youtube.com/watch?v=MELJpN_zPD8
(https://www.youtube.com/watch?v=MELJpN_zPD8)

(https://github.com/AtlasFPGA/CYC1000/blob/main/FOTOS/TheSonders_USBKeyboard_VIC20.png)
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on April 02, 2024, 05:28:09 PM
Yoomp! ATARI 800XL Captured from HDMI with sound.

Tutorial 1 porting ZX Spectrum 48k in vhdl - Spanish -

Tutorial 2 porting ZX Spectrum 48k in vhdl - Spanish -
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on April 03, 2024, 07:00:20 PM
How to compile manualy without github knowledge, An ATARI STE implementation from MiST - Spanish - :

The implementation is ported by @somhi:
https://github.com/AtlasFPGA/MiSTery
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on April 03, 2024, 07:05:53 PM
Various implementations of Spectrums an Pentagons maybe Tsconf:


https://en.wikipedia.org/wiki/List_of_ZX_Spectrum_clones
All of those computers that still are increasing today, belongs to you, Sir Clive!


I'm goin to work,in the future hopping that in the future the CYC1000 & MAX1000, appears in that list.
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on May 14, 2024, 12:50:35 AM
Explanation of the errors produced in the UnAMIGA core implementation, which is why the CYC1000 is very interesting to have a PAL clock 28,37516Mhz to achieve an Amiga - Minimig hdl correct description. - Spanish -


PIN DESCRIPTION:
https://github.com/AtlasFPGA/PINOUT_ATLAS_CYC1000

We choose the CYC1000 because it has two clocks one With PIN_M2 a MENS 12Mhz an one free -> PAL 28,37516Mhz.

You can see some vídeos of the development UnAMIGA AGA CORE.

TURRICAN II AGA

NEW AMIGA OS

I have stopped being involved in the development of this UnAMIGA core but other ATLAS developers continue with its development.
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on May 16, 2024, 02:26:37 PM
David Carrion create the multicore Bytednia, you can see a cold boot.
Rasberry Pi plus CYC1000.

Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on June 23, 2024, 03:18:45 PM
MSX1FPGA
MSX1 cloned in FPGA

This project is an MSX1 cloned in FPGA, with some parts of the OCM project.

Specifications:

Multiple boards;
MSX1 50Hz or 60Hz;
RAM Mapper size configurable, depends on the board;
128K Nextor (MSX-DOS2 evolution) ROM with SD driver;
Megaram SCC/SCC+ from OCM project (size configurable, depends on the board);
Keyboard map reconfigurable;
Simple switched I/O ports (no software yet);
15/31KHz configurable.
Scanlines configurable.
HDMI output on some boards.
In the project there is a loader (IPL) to boot and load ROMs and configuration from SD card.

The "CONFIG.TXT" configuration file is self-explanatory.

You can see the MSX1FPGA here playing KONAMI KING'S VALLLEY:
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on July 08, 2024, 05:06:59 PM
In the following Video the atlas is also faithful to the original CGA in its "COMPOSITE VIDEO" mode.
With PAL format which in an expanded form reaches 512 Colors.


You can see Core PC XT, Area 5150 CGA Demo for the IBM PC by CRTC+Hornet

And the code of this core:
https://github.com/somhi/PCXT_DeMiSTify/tree/main/demistify/atlas_cyc

PAL wrapper:
https://github.com/TheSonders/COLOR_PAL
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on August 10, 2024, 11:20:45 AM
Spectrum ZX implementation in DVI/HDMI:
https://github.com/AtlasFPGA/zx/tree/main/atlas.cyc

Playing Marble Madness with a CYC1000 and the I/O Atlas Board:
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on August 10, 2024, 11:40:33 AM
The core I used is the VIC20 taken from MiST.
https://github.com/AtlasFPGA/VIC20_MiST


In this video we see how important the Cyclone10LP family is since it is the most suitable for inheriting code from previous versions of the Cyclone family, Cyclone II, Cyclone III and Cyclone IV.
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on August 22, 2024, 11:49:41 AM
Core Next186 a clone i80186 that has 80Mips with MPU401 this port belongs to @distwave81. In these videos The Raspberry PI act as a synthesizer.

In This vídeo the Netx186 plays Monkey Island:

In This vídeo the Next186 plays Cool Spot:

In This video the Next186 plays Wing Commander:

Some benchmarcks of Next186:

Sources:
https://github.com/AtlasFPGA/Next186_SoC
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on September 22, 2024, 08:26:29 AM
The first console implemented in CYC1000:

GAMEBOY adapted from the SameBoy project https://github.com/LIJI32/SameBoy/

The github adapted version "CYC1000" of Gameboy in HDMI, the sources came from MiST FPGA Platform:
https://github.com/AtlasFPGA/gameboy
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on January 11, 2025, 11:21:51 AM
Writing the maximum Command Interpreter Path length , in MSX 1 From Fabio Benabeluto, and Radio-RK86 "РАДИО-86РК".
Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Subcritical on February 25, 2025, 06:22:28 PM
   I use the CYC1000 FPGA mainly because its CYCLONE 10 LP 10CL025YU256C8G FPGA allows me to use differential pairs, with wrappers for DVI, or HDMI.

   Calculating LENGH of DIFERENTIAL PAIRS used in ATLAS:


(https://github.com/AtlasFPGA/PARES_DIFERENCIALES_CYC1000/raw/main/FOTOS/FOTO_ALTA_RESOLUCION_CYC1000_PINEADO.png)


Trace the lines in paper to achieve or estimate the length:
(https://github.com/AtlasFPGA/PARES_DIFERENCIALES_CYC1000/raw/main/FOTOS/P1040085.JPG)

Aprox Length "It´s usefull in diferential pairs":

PIN_N2->  25,50_mm
PIN_N1->  22,92_mm
PIN_P2->  21,75_mm
PIN_P1->  10,52_mm
PIN_J2->  13,80_mm
PIN_J1->  13,56_mm
PIN_L15-> 12,63_mm
PIN_L16-> 15,20_mm

TMDS   DVI    VGA64  SCART128       10CL025YU256C8G
TMDS[0]   CLK-   HS     CSYNC     L16
TMDS[1]   CLK+   VS     G[0]      L15
TMDS[2]   0-   BLUE[0]    B[0]        P1
TMDS[3]   0+   BLUE[1]    B[1]        P2
TMDS[4]   1-   GREEN[0]   G[1]        J1
TMDS[5]   1+   GREEN[1]   G[2]        J2
TMDS[6]   2-   RED[0]     R[0]        N1
TMDS[7]   2+   RED[1]     R[1]        N2

A translation from this github:
https://github.com/AtlasFPGA/PARES_DIFERENCIALES_CYC1000            







Title: Re: I present a comunity of INICIATIVA ATLAS - ATLAS INITIATIVE for CYC1000:
Post by: Thomas D on February 26, 2025, 10:26:18 AM
Hi

Quote from: Subcritical on February 25, 2025, 06:22:28 PMAprox Length "It´s usefull in diferential pairs":

PIN_N2->  25,50_mm
PIN_N1->  22,92_mm
PIN_P2->  21,75_mm
PIN_P1->  10,52_mm
PIN_J2->  13,80_mm
PIN_J1->  13,56_mm
PIN_L15-> 12,63_mm
PIN_L16-> 15,20_mm

Trenz has an Excel sheet with pinout and trace length online. You can get the exact length there:


br
Thomas