Hello,
I am using TE0841-02 SoM with TEBA0841-02 Daughter card and TE0790-03 Xmod.
TEBA0841-02 DIP SW setting(0000) XMOD setting(1000)
I have set VCCIOA to 3.3V which is HR bank 64 of TE0841-02 . I am observing the signal assign to TEBA0841 J20 connector not getting sense by FPGA.
I have added ILA in design and it always show logic '0'.
I am supplying power to TEBA0841-02 through J3 5(3.3V) 6(GND) using lab power supply.
Some Other observations are
If I measure voltage at J20 pin 5 or 45 pin number voltage is appox 4V.
Board consuming more current when i connect USB cable to XMOD.
Thank you
Hi,
this is the same board like on this post:
https://forum.trenz-electronic.de/index.php/topic,1325.0.html
?
QuoteIf I measure voltage at J20 pin 5 or 45 pin number voltage is appox 4V.
J20 Pin5 is 3.3V power domain. --> same like J3-5 --> so this is your external lab power supply.
This power rail should have 3.3V. It can happens that you has damaged some components now.
--> Reduce voltage of your external lab power supply, so that you has again 3.3V. Maybe it works again, in case nothing was damaged.
PS: this is the reason for your JTAG problem on: https://forum.trenz-electronic.de/index.php/topic,1325.0.html
br
John
Hello John,
This is not same board. I have 2 set of boards. In this setup JTAG(using XMOD) is working and FPGA device is also detecting.
But voltage Bank 64 IO not sampling correct(3.3V) IO level.
Thank You.
Hi,
you wrote:
QuoteIf I measure voltage at J20 pin 5 or 45 pin number voltage is appox 4V.
This is to much for HR banks, so I think FPGA Bank is damaged, see:
https://www.xilinx.com/support/documentation/data_sheets/ds892-kintex-ultrascale-data-sheet.pdf
page 1
br
John