Hi,
I am looking to use the QSPI flash to store user data in the portion unused for configuration and have a few questions:
1. What is the part number actually used on the boards? The schematic shows S25FL256SAGBHI20, which is a 256MB Cypress flash - is this correct?
2. In order to constrain the Xilinx QSPI IP core, I need to know the board routing delays associated with CS, SCK, and DQ0-3. Can you provide these?
Thanks,
Mike Brown
Hi,
we offer schematics for all variants:
https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0741/REV03/Documents
--> S25FL256SAGBHI20
We offer reference design which included QSPI IP:
https://wiki.trenz-electronic.de/display/PD/TE0741+Test+Board
QSPI is placed next to FPGA, so delay is short enough that you must not specify it.
br
John