Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: johnabel on February 27, 2020, 12:12:22 PM

Title: config SPI mode for TE0803
Post by: johnabel on February 27, 2020, 12:12:22 PM
What should the configuration dual QSPI be for the TE0803?
Is it x8-dual-parallel? x4-dual-stacked?
Title: Re: config SPI mode for TE0803
Post by: JH on February 27, 2020, 12:28:05 PM
Hi,

dual parallel...
see reference design /board_files/TE0803_board_files.csv  or the PS IP in your vivado project, in case you has used our board part files for initialisation. or schematics or TRM (https://wiki.trenz-electronic.de/display/PD/TE0803+TRM#TE0803TRM-Flash)


br
John
Title: Re: config SPI mode for TE0803
Post by: johnabel on February 27, 2020, 03:38:11 PM

Thanks, all my worries vanished quickly this time.
I found (just for future readers)  that the TE0808 board needs to be power-cycled (previous Vivado hardware manager disconnection to prevent a nasty hang...) before changing the boot mode in the DIP switch
Title: Re: config SPI mode for TE0803
Post by: JH on February 28, 2020, 10:13:20 AM
Hi,
reset button has double usage (PS Soft Reset or  PS POR Reset, depending how long you hold reset button.)
Boot mode isn't read again when you us soft rest (press short time the button), see:
https://wiki.trenz-electronic.de/display/PD/TEBF0808+Getting+Started#TEBF0808GettingStarted-DIP-SwitchesandPushButtons

And yes, also open JTAG connection can prevent reboot and also your design can on block JTAG access. There are a lot off things which can be interact, see also Xilinx UG1085 :
https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf

br
John
Title: Re: config SPI mode for TE0803
Post by: johnabel on February 28, 2020, 10:20:21 AM

Good to know. A bit shorter procedure.