Recent posts

#1

UltraScale / Ultrascale MPSoC + Zephyr A53

Last post by DR - July 25, 2024, 05:21:11 PM

Hey A53 Gurus,

Has anyone attempted to build a Zephyr project for the A53 cores on any of the Ultrascale + modules (e.g. TE0820)?
If so, can you share process, pointers, examples?

I am struggling to get Petalinux to run under our latest Fedora releases (unsupported), and also looking for something lighter weight.

I see there is support for the R5 cores, but not the A53 cores.
Also - It appears there is A53 support on other platforms like NXP.

Thanks much!

#2

Trenz Electronic FPGA Modules / Re: Using OpenOcd to dump_imag...

Last post by halyardhire - July 15, 2024, 11:19:31 AM

SoftConsole/Eclipse works fine to Flash the elf to the SMF2000 device..  but I need to read the NVM and save it to a file.

And while a dump_image seems to exist for OpenOcd 0.10 
( https://riverloopsecurity.com/blog/2021/07/hw-101-jtag-part3/ )

Telnetting to port 4444 doesn't work, but 3334 does.. which makes me think that the only way to get to openocd is thru 'fpserver'?

Any suggestions?

Hi I'm a new member and have the same question. Any solution?

#3

EDDP-EDPS Support / Re: TE0950 Power consumption /...

Last post by M Kirberg - July 10, 2024, 07:57:56 AM

Hi,

Versal has new and good power estimation tools - did you try these?

br

#4

Open source hardware / Re: TE0890 SPI ELF Bootloader

Last post by MA - July 09, 2024, 12:49:43 PM

Hi,
I can't understand exactly what you are doing. The reference design provided by Trenz generates the following 2 elf-files:

• hello_te0890.elf
• spi_bootloader.elf

elf-files are the software application files for zynq or MicroBlaze Processor Systems. They will be generated with Vitis. You can find an older manual for Vitis in the following link

• https://wiki.trenz-electronic.de/display/PD/Vitis

#5

Trenz Electronic FPGA Modules / Re: TE0720 issue

Last post by MA - July 09, 2024, 12:16:14 PM

Hi,

Why not delete the memory once again?

#6

Trenz Electronic FPGA Modules / TE0720 issue

Last post by carefullythe - July 09, 2024, 06:39:30 AM

Hello,

At some point I must have programmed the QSPI with U-Boot. Now every time I try to run a test app from Vitis I see U-Boot start. Sometimes my test app will run after it but usually it does not.

#7

CYC1000 community projects / Re: I present a comunity of IN...

Last post by Subcritical - July 08, 2024, 05:06:59 PM

In the following Video the atlas is also faithful to the original CGA in its "COMPOSITE VIDEO" mode.
With PAL format which in an expanded form reaches 512 Colors.

You can see Core PC XT, Area 5150 CGA Demo for the IBM PC by CRTC+Hornet

And the code of this core:
https://github.com/somhi/PCXT_DeMiSTify/tree/main/demistify/atlas_cyc

PAL wrapper:
https://github.com/TheSonders/COLOR_PAL

#8

Trenz Electronic FPGA Modules / Re: TE0820 -03 and -04 MODE Pi...

Last post by JH - July 08, 2024, 11:04:56 AM

Hi,
with default CPLD Firmware it's on both Versions(table row has swapped only):
Mode Pin Low: SD Card
Mode Pin High QSPI Flash
Table has only switch the columns.

Module which was delivered since June 2022, we have extended bidirectional Pin PGOOD also as Boot Mode for default CPLD Firmware.

In case PGOOD is set low on power up, than JTAG only boot mode is selected
See also:
https://wiki.trenz-electronic.de/display/PD/TE0820+CPLD#TE0820CPLD-RevisionChanges
https://wiki.trenz-electronic.de/display/PD/TE0820+AVN-20220506+4+x+5+modules+controller+IOs+redefinition+and+CPLD+updates

JTAG Boot and eMMC boot Mode can be selected now.
As long as PGOOD Pin is high, it's like older firmware, so it should be backward compatible.

Regarding Floating Pins:
Mode Pin and PGOOD has week pullup on the module, but you should not keep it floating.
See 4x5 Controller Pins:
https://wiki.trenz-electronic.de/display/PD/4+x+5+SoM+Integration+Guide#id-4x5SoMIntegrationGuide-4x5ModuleControllerIOs

br
John

#9

Trenz Electronic FPGA Modules / TE0820 -03 and -04 MODE Pin

Last post by anatolewilson - July 08, 2024, 08:50:22 AM

We are using TE0820-03 and will be using -04 soon.
I was looking at TRM for both configurations and MODE pin setting Table 2 in -04 is reverse of -03.
Has Trenz actually changed this?
Second question, is it actually fine to float the MODE pin if booting from QSPI?
Thanks.

#10

Trenz Electronic FPGA Modules / Re: TE0820+HDMI701

Last post by PaulChang - July 08, 2024, 04:06:59 AM

Hi John,

1.Waveshare 10.1inch HDMI LCD B 1280×800 IPS Touch Screen.
2.MSI optix MPG341CQR
please see the atthach file,thanks.

Best Regards
Paul