Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: r.brue on April 06, 2022, 10:47:52 AM

Title: TE0820 JTAG mode enabling
Post by: r.brue on April 06, 2022, 10:47:52 AM
Hello, I have a TE0820-04-4DE21FA module, I am trying to program the PL and to push a simple "Hello world" program as standalone using Vivado+Vitis 2020.2.
I can program the PL using a JTAG connector (TE0790-03) and a TE0705-04 board (switch S3-3 ON) but when I run the Vitis application (as described here https://docs.xilinx.com/r/en-US/ug1400-vitis-embedded/Launch-Configurations (https://docs.xilinx.com/r/en-US/ug1400-vitis-embedded/Launch-Configurations)) it says the following and the app is never run (images attached).

Even though I continue by clicking on "Yes", after a while it prompts the errors (image attached).

How can I simply run the application after programming the PL on my system?
Title: Re: TE0820 JTAG mode enabling
Post by: JH on April 11, 2022, 07:24:35 AM
Hi,
it's easier to create boot.bin an start hello world from SD. PS and PL belongs together. PS initialisation will be done by FSBL (which must be includedalso into the boot.bin) normally.
We offers a reference design an prebuilt binaries, you can use them to test. Download includes also the files to regenerate this project by yourself
https://wiki.trenz-electronic.de/display/PD/TE0820+Test+Board

PS: We are working on a new CPLD Version to allow JTAG only boot mode also (we will use PGOOD as input in the next CPLD release), I will publish more information about this topic in the next weeks. Currently QSPI/SD is select only without CPLD Firmware update. But we provide also alternative firmware to select JTAG only, see:
https://wiki.trenz-electronic.de/display/PD/TE0820+CPLD+Firmware

Br
John