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#1
Trenz Electronic FPGA Modules / TE0701-06 Assembly Diagrams FM...
Last post by milos.subotic@uns.ac.rs - October 11, 2024, 09:14:40 AMCould you please update Assembly Diagrams for TE0701-06 board aka AD-TE0701-06.pdf file with with positions of M2.5 FMC holes, those two near edge of card?
I compared AD-TE0701-06.pdf with AD-TE0701-05.pdf some distances are same, some are off by 0.02mm (which is Ok), but FMC hole near S3 switch is on x-axis off by 1.5mm (maybe mistake), while y-axis distance does not exists.
Also FMC hole near L8 do not have any distances assigned (assume that y-axis distance is same as one of hole near S3).
Considering that even M3 hole changed position between AD-TE0701-06.pdf and AD-TE0701-05.pdf (kind a strange to move them, maybe also mistake, maybe you move them bcs were on the way of power supply), I have pretty low confidence to numbers given in AD-TE0701-05.pdf, so I pledge you to update AD-TE0701-06.pdf.
I have hard time to measure all this, especially 0.2mm tolerance for typical 2.7mm hole M2.5 for FMC.
Similar problem already existed on earlier version of TE0701:
https://forum.trenz-electronic.de/index.php?topic=300.0
Thanks in advance.
I compared AD-TE0701-06.pdf with AD-TE0701-05.pdf some distances are same, some are off by 0.02mm (which is Ok), but FMC hole near S3 switch is on x-axis off by 1.5mm (maybe mistake), while y-axis distance does not exists.
Also FMC hole near L8 do not have any distances assigned (assume that y-axis distance is same as one of hole near S3).
Considering that even M3 hole changed position between AD-TE0701-06.pdf and AD-TE0701-05.pdf (kind a strange to move them, maybe also mistake, maybe you move them bcs were on the way of power supply), I have pretty low confidence to numbers given in AD-TE0701-05.pdf, so I pledge you to update AD-TE0701-06.pdf.
I have hard time to measure all this, especially 0.2mm tolerance for typical 2.7mm hole M2.5 for FMC.
Similar problem already existed on earlier version of TE0701:
https://forum.trenz-electronic.de/index.php?topic=300.0
Thanks in advance.
#2
Trenz Electronic FPGA Modules / Re: TE0715 new reference desig...
Last post by Swiss222 - October 09, 2024, 10:54:54 AMHi, thank you for your answer!
This topic is still very confusing to me, I would appreciate if you understand this better and could answer me:
People keep talking about Yocto vs. Petalinux but I don't see how this makes any difference when talking about security updates. From my perspective, the main issue is the linux kernel that Xilinx provides (https://github.com/Xilinx/linux-xlnx) and updating it in the project.
Both are possible in both petalinux as well as yocto if I am not mistaken? Is it maybe easier to update with pure Yocto?
I followed these steps (https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/757891119/Migrate+from+PetaLinux+project+to+Yocto+project#Importing-Petalinux-Project-into-Yocto-Project) to migrate my petalinux project into a yocto project and I don't see how that will make the updating process easier for me.
I have to ask the same question in Xilinx's forum but maybe you could already clarify some points for me.
Thank you.
This topic is still very confusing to me, I would appreciate if you understand this better and could answer me:
People keep talking about Yocto vs. Petalinux but I don't see how this makes any difference when talking about security updates. From my perspective, the main issue is the linux kernel that Xilinx provides (https://github.com/Xilinx/linux-xlnx) and updating it in the project.
Both are possible in both petalinux as well as yocto if I am not mistaken? Is it maybe easier to update with pure Yocto?
I followed these steps (https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/757891119/Migrate+from+PetaLinux+project+to+Yocto+project#Importing-Petalinux-Project-into-Yocto-Project) to migrate my petalinux project into a yocto project and I don't see how that will make the updating process easier for me.
I have to ask the same question in Xilinx's forum but maybe you could already clarify some points for me.
Thank you.
#3
Trenz Electronic FPGA Modules / Re: TE0715 + TE0701 Board Prog...
Last post by JH - October 09, 2024, 09:09:59 AMHi,
program flash of 7 series zynq with newer Vivado tools is not longer so easy when boot mode is not JTAG only. Here are some notes about this topic:
https://wiki.trenz-electronic.de/pages/viewpage.action?pageId=105689937
We start to update CPLDs of the 4x5 modules and carriers to use PGOOD signal of the module as additional boot mode pin.
TE0715 supports this since the middle of the last year, TE0701 carrier CPLD is currently in development for an update.
In case your TE0715 is older, than It's unfortunately not possible to update Module CPLD with TE0701, it's planned to add this feature in the next PCB Update of TE0701.
The easiest way for you is at the moment to download Vivado Labtool 2017.2 and use this to program:
https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/archive.html
-->https://www.xilinx.com/member/forms/download/xef.html?filename=Xilinx_Vivado_Lab_Win_2017.2_0616_1.tar.gz
In this case separate FSBL is not needed, only Boot.bin must be set inside Hardware manager. QSPI Flash type is in the most cases "s25fl256s-3.3v-qspi-x4-single" (see test_board\board_files\TE0715_board_files.csv)
In case you has still trouble, send me the serial number of the module and I check if you has select correct files.
br
John
program flash of 7 series zynq with newer Vivado tools is not longer so easy when boot mode is not JTAG only. Here are some notes about this topic:
https://wiki.trenz-electronic.de/pages/viewpage.action?pageId=105689937
We start to update CPLDs of the 4x5 modules and carriers to use PGOOD signal of the module as additional boot mode pin.
TE0715 supports this since the middle of the last year, TE0701 carrier CPLD is currently in development for an update.
In case your TE0715 is older, than It's unfortunately not possible to update Module CPLD with TE0701, it's planned to add this feature in the next PCB Update of TE0701.
The easiest way for you is at the moment to download Vivado Labtool 2017.2 and use this to program:
https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/archive.html
-->https://www.xilinx.com/member/forms/download/xef.html?filename=Xilinx_Vivado_Lab_Win_2017.2_0616_1.tar.gz
In this case separate FSBL is not needed, only Boot.bin must be set inside Hardware manager. QSPI Flash type is in the most cases "s25fl256s-3.3v-qspi-x4-single" (see test_board\board_files\TE0715_board_files.csv)
In case you has still trouble, send me the serial number of the module and I check if you has select correct files.
br
John
#4
Trenz Electronic FPGA Modules / TE0715 + TE0701 Board Program ...
Last post by Jason_Baxter - October 08, 2024, 02:02:16 PMHello,
I have issues writing the flash to the TE0715 mounted on a TE0701 board. I have created an FSBL, imported the prebuilt 04_30_3e_1gb, built the project, created a boot image and then connected the JTAG via mini-USB. I am trying to flash using qspi-x4-single but get the following error. The progress bar hangs and nothing happens. The dip switch (S3-3) is set to the Xilinx chip (on TE0701) and not the CPLD. The board is powered via the 12V supply. I'm unsure what else to do and am looking for guidance. Please let me know if there is any more key information I can provide.
Thank you.
I have issues writing the flash to the TE0715 mounted on a TE0701 board. I have created an FSBL, imported the prebuilt 04_30_3e_1gb, built the project, created a boot image and then connected the JTAG via mini-USB. I am trying to flash using qspi-x4-single but get the following error. The progress bar hangs and nothing happens. The dip switch (S3-3) is set to the Xilinx chip (on TE0701) and not the CPLD. The board is powered via the 12V supply. I'm unsure what else to do and am looking for guidance. Please let me know if there is any more key information I can provide.
Thank you.
Code Select
****** Xilinx Program Flash
****** Program Flash v2022.2 (64-bit)
**** SW Build (by xbuild) on 2022-10-13-12:09:39
** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
WARNING: Failed to connect to hw_server at TCP:127.0.0.1:3121
Attempting to launch hw_server at TCP:127.0.0.1:3121
Connected to hw_server @ TCP:127.0.0.1:3121
Target not specified. Selecting target_id 2 (arm_dap) by default.
Retrieving Flash info...
Initialization done
Using default mini u-boot image file - C:/Xilinx2022/Vitis/2022.2/data\xicom\cfgmem\uboot\zynq_qspi_x4_single.bin
===== mrd->addr=0xF800025C, data=0x00000001 =====
BOOT_MODE REG = 0x00000001
WARNING: [Xicom 50-100] The current boot mode is QSPI.
Flash programming is not supported with the selected boot mode.If flash programming fails, configure device for JTAG boot mode and try again. #5
Trenz Electronic FPGA Modules / Re: TE0722 not detected by viv...
Last post by JH - October 08, 2024, 11:04:47 AMHi,
primary boot from SD is not possible, because of the small FPGA package with less IOs.
What you can do later is program QSPI with an FSBL which is modified to search bitstream and other files from SD(change boot mode inside fsbl code instead using boot mode pins, he should use fix sd and put second boot.bin with bitstream to SD card. In this case PS Konfiguration depends always from your QSPI FSBL version).
Application will be more difficult later, because TE0722 is without RAM, so you need to put it into OCM or block ram or xip: https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/2418900993/Zynq+7000+Tips+and+Tricks#Execute-In-Place-(XIP)
br
John
primary boot from SD is not possible, because of the small FPGA package with less IOs.
What you can do later is program QSPI with an FSBL which is modified to search bitstream and other files from SD(change boot mode inside fsbl code instead using boot mode pins, he should use fix sd and put second boot.bin with bitstream to SD card. In this case PS Konfiguration depends always from your QSPI FSBL version).
Application will be more difficult later, because TE0722 is without RAM, so you need to put it into OCM or block ram or xip: https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/2418900993/Zynq+7000+Tips+and+Tricks#Execute-In-Place-(XIP)
br
John
#6
Trenz Electronic FPGA Modules / Re: TE0722 not detected by viv...
Last post by vertapple - October 07, 2024, 10:36:02 AMHey,
thank you for the help. I will test ASAP.
I am confident in the pin setup but it wouldn't hurt to test regardless.
I was recommended to try flash from the SD card as a way to get around the programmer? From the TRM it seem like it may be possible but I cannot find resources on how to do so. Would you be able to advise if that is possible?
Regards,
Jake
thank you for the help. I will test ASAP.
I am confident in the pin setup but it wouldn't hurt to test regardless.
I was recommended to try flash from the SD card as a way to get around the programmer? From the TRM it seem like it may be possible but I cannot find resources on how to do so. Would you be able to advise if that is possible?
Regards,
Jake
#7
Trenz Electronic FPGA Modules / Re: TE0703-06 works with TE082...
Last post by JH - October 07, 2024, 10:02:33 AMHi Aleksei,
if I see it correctly, than you wrote to the technical support of trenz and a RMA was opened for this module with ZU4?
br
John
if I see it correctly, than you wrote to the technical support of trenz and a RMA was opened for this module with ZU4?
br
John
#8
Trenz Electronic FPGA Modules / Re: TE0722 not detected by viv...
Last post by JH - October 07, 2024, 09:51:27 AMHi,
Pin P1-9(GND) and Pin1-12(3.3V) are correct.
I've tried it out with older revision02 board and it was working. I've a little bit higher current consumption but on the older module revision are some more components on the board.
Can power 3.3V at first and than connect usb to the xmod?
I saw your effect one or two times that SoC was not visible when I has done it in another way(first USB than 3.3V), But maybe I just had no real contact for a short time, I just held the supply to the pins.
Can you also check that you use the correct pin and not accidentally some neighbour pin and you back sourcing the module over some normal IOs.
br
John
Pin P1-9(GND) and Pin1-12(3.3V) are correct.
I've tried it out with older revision02 board and it was working. I've a little bit higher current consumption but on the older module revision are some more components on the board.
Can power 3.3V at first and than connect usb to the xmod?
I saw your effect one or two times that SoC was not visible when I has done it in another way(first USB than 3.3V), But maybe I just had no real contact for a short time, I just held the supply to the pins.
Can you also check that you use the correct pin and not accidentally some neighbour pin and you back sourcing the module over some normal IOs.
br
John
#9
Trenz Electronic FPGA Modules / TE0703-06 works with TE0820-03...
Last post by Aleksei Rostov - October 04, 2024, 01:00:30 PMI have carrier TE0703-06 and two modules: TE0820-03-2AI21FA (2CG) and TE0820-05-4DE21MA (4EV).
I'm using for corresponding board prebuilt images for QSPI and SD boot modes:
test_board\prebuilt\boot_images\2cg_1i_2gb\u-boot\BOOT.bin
test_board\prebuilt\boot_images\4ev_1e_2gb\u-boot\BOOT.bin
TE0820-03-2AI21FA works perfect.
TE0820-05-4DE21MA very unstable, mostly fails on FSBL or doesn't response at all.
Very often PS ERROR red LED (D3).
pmu_global.csu_br_error can be 80004b00 (for SD mode), 80009292, 80002400 (for QSPI mode).
Why TE0703-06+TE0820-05-4EV fails, although TE0703-06 has the same settings and TE0820-03-2CG works?
I'm using for corresponding board prebuilt images for QSPI and SD boot modes:
test_board\prebuilt\boot_images\2cg_1i_2gb\u-boot\BOOT.bin
test_board\prebuilt\boot_images\4ev_1e_2gb\u-boot\BOOT.bin
TE0820-03-2AI21FA works perfect.
TE0820-05-4DE21MA very unstable, mostly fails on FSBL or doesn't response at all.
Very often PS ERROR red LED (D3).
pmu_global.csu_br_error can be 80004b00 (for SD mode), 80009292, 80002400 (for QSPI mode).
Why TE0703-06+TE0820-05-4EV fails, although TE0703-06 has the same settings and TE0820-03-2CG works?
#10
Trenz Electronic FPGA Modules / Re: TE0722 not detected by viv...
Last post by vertapple - October 04, 2024, 11:01:27 AMGood day,
I attached the 3.3V and ground to the pins between P7 and P8
as shown here. perhaps these are not the correct pins?
The current consumption from the power supply was typically around 0.16 A (I thought this a bit high but drew it up to the SOM and the programmer being on the supply).
I have not measured the one time voltage but will be able to once I'm back in the lab.
When I switch back to the TE0790 it does work again.
I appreciate the assistance.
I attached the 3.3V and ground to the pins between P7 and P8
as shown here. perhaps these are not the correct pins?The current consumption from the power supply was typically around 0.16 A (I thought this a bit high but drew it up to the SOM and the programmer being on the supply).
I have not measured the one time voltage but will be able to once I'm back in the lab.
When I switch back to the TE0790 it does work again.
I appreciate the assistance.