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Hi John,

Thanks for your assistance. We are using a lab bench power supply to power the zynq. We managed to get the system working with the src code from the prebuilt fsbl application.

MAX1000 community projects / Re: Opening/Creating Basic Example Project
« Last post by Thomas D on June 27, 2022, 11:45:59 AM »
it seems that you are using the Quartus 18.1 standard edition. We have created and tested the reference design with the lite edition. So i can only tell you what to do with the lite edition, but it can also work with the standard edition.

1. The easiest and recommended way is to install the update to quartus version 18.1.1:
Standard edition:

Lite edition:

2. (not recommended) You can also add following line to the path/to/intelFPGA_lite/18.1/ip/altera/altera_gpio_lite/altera_gpio_lite_wizard.lst file (example: see attached screenshot): <ALIAS>GPIO Lite Intel FPGA IP v18.1</ALIAS>

Trenz Electronic FPGA Modules / Re: TE0712 and TE0706 ethernet
« Last post by Waldi3141 on June 22, 2022, 07:46:04 AM »
Hello Peppe,
the MicroBlaze MCS IP, that you left out, runs the program which you can find in ...\test_board\sw_lib\sw_apps\scu_te0712\src. It configures the onBoard Clocking Chip Si5338. And this chip creates a Clock for the Ethernet PHY. So i think you need to have the MicroBlaze MCS in your Design associated with the scu_te0712.elf.
Also this stands here:
The Ethernet PHY needs a 50MHz Clock.

best regards!

MAX1000 community projects / Re: Opening/Creating Basic Example Project
« Last post by blipton on June 22, 2022, 04:07:12 AM »
Forgot the screenshot of the error message during create_win_setup.cmd
MAX1000 community projects / Opening/Creating Basic Example Project
« Last post by blipton on June 22, 2022, 04:04:55 AM »
Not sure what I'm doing wrong... or what benefit there is to the the bash scripts are over a standard quartus archive file...

but when I execute _create_win_setup.cmd, and select '0'  (Module/Project Creation), and the board, it generates plenty activity but ultimately has an error (see Bash.png).

It does however seem to create a project, but when I open it in Quartus, it won't synthesize, nor are the pin assignments set.

How can I open the test_board example such that it synthesizes a file that can be programmed?
Trenz Electronic FPGA Modules / Re: TE0712 and TE0706 ethernet
« Last post by PEPPE on June 21, 2022, 04:10:35 PM »
Hi Waldi,

I've some problems to install the version 2021.2 on my workstation because I haven't administrator permissions. I'll try to install vivado 2021.2 on my personal computer and I'll tell you the result. Meanwhile can I try another solution on my workstation?


UltraScale / Re: No longer to debug when programmed RSA_EN eFuse
« Last post by JH on June 20, 2022, 08:20:01 AM »

with Efuse programming there are many setting options, I am not familiar with it, so I can't help you much.  I think you has disabled JTAG, that's the reason why you did not longer see the device with vitis. I would expect QSPI boot should work, as long as you use the same binaries, which match your key.

I would suggest to wrote on the xilinx forum, that's more a general question for Xilinx. Community is much bigger there.
Trenz Electronic FPGA Modules / Re: TEBT0808 and TE0808
« Last post by JH on June 20, 2022, 06:14:27 AM »
in case you see "dummy_dap" than PS is not ready. Check DIP Switches for power and also boot mode(should be jtag only).

Check also your external power supply.
Trenz Electronic FPGA Modules / TEBT0808 and TE0808
« Last post by pavlovsr on June 16, 2022, 08:09:29 PM »
I am attempting to flash a TE0803-04 (TE0808-04-9GI21-A) via the PS JTAG USB link TE0790. These were ordered separately from each other and therefore I believe that the SOM does not have any firmware loaded in the QSPI Flash.

1. Could you please provide a TCL script of successful building / programming of a device ? I have found resources at the (Project Delivery) and have been having a few issues with the target not connecting or providing access to the full target list:
xsct % connect
xcst% connect
xsct% targets                                                                                                                         
  1  PS TAP (Cannot poll JTAG port: CBR not done, debug access not allowed)
     2  PMU
     3  PL
  4  dummy_dap

# Then some time later, with apparently no deliberate input
xsct% targets                                                                                                                               
  1  PS TAP
     2  PMU
     3  PL
  5  PSU
     6  RPU (Reset)
        7  Cortex-R5 #0 (RPU Reset)
        8  Cortex-R5 #1 (RPU Reset)
     9  APU (L2 Cache Reset)
       10  Cortex-A53 #0 (APU Reset)
       11  Cortex-A53 #1 (APU Reset)
       12  Cortex-A53 #2 (APU Reset)
       13  Cortex-A53 #3 (APU Reset)
2. Is there a way to tell if a part is damaged? The device can be successfully programmed, but I have yet to see a full sign of life as the UART connections maybe need to be remapped in the vivado project to map to the input of the TE0790.

3. Why is the file in the prebuilt versions called hello_te0807? This appears to be the wrong board, and I have checked the downloads and part selection (33) several times.

EDIT: Resolution to 1 and 2 are that the board was defective, long boot loading times and error indicators led to debugging physical power supply issues that are probably specific to my situation.
EDDP-EDPS Support / Serial/UART not working on Linux with the SMF2000
« Last post by adrien220615 on June 15, 2022, 06:07:48 PM »
Hi all,

(First post, I hope it respects the local habits)

I have a SMF2000 (SmartFusion2) board and I'm trying to set it up with Linux. I've downloaded SoftConsole-v2021.3- and I'm running a basic hello world program.

I expect to see a UART file (/dev/ttyUSB0) for the printfs, but nothing appears. I've tried to look into udev rules without success. How do you get the serial output from the SF2 on Linux? (I know the SF2 code is fine, it works perfectly on Windows)

Thanks in advance


Detailed info on my setup:

Setting up udev rules attempt 1/2:

Code: [Select]
sudo cp /opt/Microchip/SoftConsole-v2021.3- /etc/udev/rules.d
18:03:41 adrien@adrien-pts [nodraak/cpu-usage *] ~/Documents/2021-PTS/work/Kickstage/2021-08-work/astris-fsw-framework  && sudo udevadm control --reload-rules && sudo udevadm trigger

Setting up udev rules attempt 1/2:

dmesg output:

Code: [Select]
[Wed Jun 15 17:14:01 2022 <    2.836424>] usb 1-6: new high-speed USB device number 50 using xhci_hcd
[Wed Jun 15 17:14:01 2022 <    0.152970>] usb 1-6: New USB device found, idVendor=1514, idProduct=2008, bcdDevice= 7.00
[Wed Jun 15 17:14:01 2022 <    0.000015>] usb 1-6: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[Wed Jun 15 17:14:01 2022 <    0.000006>] usb 1-6: Product: Embedded FlashPro5
[Wed Jun 15 17:14:01 2022 <    0.000004>] usb 1-6: Manufacturer: Microsemi
[Wed Jun 15 17:14:01 2022 <    0.000004>] usb 1-6: SerialNumber: 0032UAXW

lsusb output:

Code: [Select]
# ... other usb devices ...
Bus 001 Device 052: ID 1514:2008 Actel Embedded FlashPro5

uname -a:

Code: [Select]
Linux xxx 5.13.0-48-generic #54~20.04.1-Ubuntu SMP Thu Jun 2 23:37:17 UTC 2022 x86_64 x86_64 x86_64 GNU/Linux

OS: Ubuntu 20.04.4 LTS
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