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#1
Trenz Electronic FPGA Modules / Re: Andromeda PHY not detected
Last post by akarcher - July 07, 2025, 11:36:42 PM
I did resolve this: The implementation of the level shifters for the LEDs was flawed on my base board, and this causes a change in the PHY address. I was unaware that the LEDs and PHY address were related at all.
#2
Trenz Electronic FPGA Modules / Andromeda PHY not detected
Last post by akarcher - July 03, 2025, 02:25:42 AM
I am using the prebuilt reference design files on AM0010-02-4DE21MA.
Board does boot, but I do not see ethernet. Since the Phy is on the module I don't think this can be an issue with baseboard I built. I did copy the AMB0010 for Ethernet, USB and SD card.

from U-boot:
ZynqMP> net list
Could not get PHY for eth0: addr 3
Could not get PHY for eth0: addr 3
eth0 : ethernet@ff0e0000 00:00:00:00:00:00
#3
UltraScale / Re: TE0865-02+TEBT0865+KK0865
Last post by JH - June 27, 2025, 08:38:01 AM
Hi,
JB1 is pinheader for TE0790 JTAG/UART programmer.It contains FTDI for USB to JTA/UART translation and small Lattice CPLD for IO Pinmapping and voltage level translation.
Links to documentation and dowloads (schematics, CPLD Firmware):
https://wiki.trenz-electronic.de/display/PD/TE0790+Resources
br
John
#4
UltraScale / Re: Support Request for TE0808...
Last post by cristina - June 24, 2025, 05:53:52 PM
Quote from: JH on June 02, 2025, 08:50:31 AMHi,
bitstream itself does not configure PS. This will be done by FSBL, not with bitstream.This is the reason why you didn't see any VIO core, because CLK is missing. In case you want to use PS-PL CLKs and you need only PL part, boot system with your configured PS from SD Card (You can use our prebuilt Boot.bin in case you use the same CLKs like we in our reference design) and overwrite PL over JTAG like you has done above.
br
John

thank you so much, it helped me a lot :)  :)
#5
MAX1000 community projects / Re: Playing ZX Spectrum in HDM...
Last post by Subcritical - June 23, 2025, 10:59:38 AM


I have trimmed the implementation of Next186 so that it can be a description of 8Kles; it still doesn't boot from SD, but over time it will. I am sharing the sources.

Next186_SoC-max1000.zip
#6
Arrow USB Programmer2 / Re: Step-by-step videos solvin...
Last post by Subcritical - June 23, 2025, 10:39:43 AM
If you install QUARTUS II Lite, don't move to other drawer because the jtag server fails to initialize, it search the path in the place you install quartus.
#7
UltraScale / Re: TE0808 starter kit selecti...
Last post by MA - June 16, 2025, 10:47:13 AM
Hi,

I apologise, but unfortunately a mistake has crept in and the board files are not up to date, as with the StarterKit design. However, you can use variant 91 (TE0808-05-9GI21-E) without any problems.

If you want to have the current board files, please download the StarterKit design and copy the complete folder "board_files" into your design. This is probably the easiest way.



br Manuela
#8
UltraScale / TE0808 starter kit selection
Last post by sr_lm - June 12, 2025, 03:59:59 PM
I have purchased this module: AMD-Zynq-Ultrascale-ZU9EG-2I-4-GByte-DDR4 TE0808-05-9GI81-E

When I downloaded the FPGA Reference Design and ran the _create_setup_linux.sh, it's missing the TE0808-05-9GI81-E as a module selection options (see attached screenshot). Is there an alternative that I could use from that list? Or is there a newer version of the reference design which includes this module?

Screenshot 2025-06-12 095950.png
#9
Trenz Electronic FPGA Modules / Re: TE0701 / TE0711 UART Pins
Last post by haraldmz - June 10, 2025, 08:45:54 AM
Quote from: Antti Lukats on June 05, 2025, 10:16:45 AMHi,
all you need is to read the TE0701 TRM, it is all explained there:

https://wiki.trenz-electronic.de/display/PD/TE0701+TRM

There is a diagram that shows that the CPLD is "forwarding" the UART pins, and a bit later is defined to WHAT pins the forwarding is done. So all the information you need is there.





Ah, I missed the table further down. Thanks for the clarification.
#10
UltraScale / Re: TE0865-02+TEBT0865+KK0865
Last post by mer - June 05, 2025, 05:47:47 PM
Ok, thanks for the reply. Let me ask this then, do you have a schematic/documentation for the little JTAG/UART board that is plugged into JB1 on the carrier? There are a couple switches on there that I'm not sure what they do. Thanks.