Recent posts

#1

Trenz Electronic FPGA Modules / Re: TE014 GTP diff traces impe...

Last post by gvzz - February 06, 2026, 11:54:39 PM

I mainly ask because attempting to compute impedance for the differential lanes according to the stackup of Simple Base TE0714:



I obtain results far from the 100 ohm differential and 50 ohm even/odd (I account that maybe is quiet difficult to obtain nearly exact results):


Computation algorithms used are:

Coupled microstrip line:

• A. Atwater, "Simplified Design Equations for Microstrip Line Parameters", Microwave Journal, pp. 109-115, November 1989.
• Kirschning and R. H. Jansen, "Accurate Wide-Range Design Equations for the Frequency-Dependent Characteristic of Parallel Coupled Microstrip Lines," in IEEE Transactions on Microwave Theory and Techniques, vol. 32, no. 1, pp. 83-90, Jan. 1984. doi: 10.1109/TMTT.1984.1132616.
• Jansen, "High-Speed Computation of Single and Coupled Microstrip Parameters Including Dispersion, High-Order Modes, Loss and Finite Strip Thickness", IEEE Trans. MTT, vol. 26, no. 2, pp. 75-82, Feb. 1978.
• March, "Microstrip Packaging: Watch the Last Step", Microwaves, vol. 20, no. 13, pp. 83.94, Dec. 1981.

According to KiCAD docs: https://docs.kicad.org/9.0/en/pcb_calculator/pcb_calculator.html

Thanks again for any support.

[TE0714-04-52I-7-B]

#2

Trenz Electronic FPGA Modules / TE014 GTP diff traces impedanc...

Last post by gvzz - February 06, 2026, 01:23:23 PM

Hi,

I am working on a small carrier card for TE0714-04-52I-7-B for which I am placing U.FL connectors on all lanes.

Since this is my first HS card, I would like to have some guideline regarding differential traces length and impedance.

As far as I know the theoretical differential impedance should be 100 ohm with 50 ohm for each trace.

I can inspect Simple base of TE0714 through Altium online viewer using AP-TEBB0714-01.zip, so the lengths on the simple base are known.

What are the GTP lanes length on TE0714-04-52I-7-B and what are the computed impedances (differential, even and odd) for the overall design, so to keep these values as reference?

Thanks,
s.

#3

Trenz Electronic FPGA Modules / TE0720, TE0790: eFUSE programm...

Last post by andreas - February 06, 2026, 11:06:31 AM

Hi,

(Possibly a duplicate post?! My login session expired, and I'm wondering if the first post went through.)

We are using the TE0720 on our custom board, which was inspired by the TE0703. JTAG for standalone debugging is implemented via a mounted TE0790. We are using Vivado, Vitis, and PetaLinux (version 2023.2).

Normally, we initialize the TE0720's QSPI and eMMC after booting Linux from the microSD card.

So far, we haven't had any problems (more than 20 systems have been successfully initialized).

The problems started when we tried to program eFUSEs for Secure Boot or debug FSBL.

Both require a mounted TE0790.

I have already successfully debugged FSBL, read ILA cores, and initialized eFUSEs with our custom board and a mounted TE0790.


However, there are cases where the TE0790 and/or the TE0790 module are damaged!

The TE0720 module operates with a 3.3V power supply (like the TE0703). The TE0720's FPGA banks are supplied with 1.8V (VCCIOA, VCCIOB, VCCIOC, and VCCIOD are all set to 1.8V). The TE0720's CPLD revision is 07 (default).

The TE0790 is powered via VCCJTAG. The TE0790's switch has the positions [On, Off, On, Off].

Do you have any further information? Any hints how to prevent further damages?

--
Andreas

#4

Trenz Electronic FPGA Modules / TE0802-02-1BEV2: Native PS USB...

Last post by mariem - January 30, 2026, 11:40:27 AM

Hello,

I am working with the TE0802-02-1BEV2 module and I would like to use the native Zynq UltraScale+ PS USB controller (USB0 or USB1) in USB Device mode (CDC ACM).

From the TRM I see:

One USB 3.0 Type-A connector listed as USB Host

One Micro-USB connector for JTAG/UART via FTDI

My questions are:

Are the PS USB controllers (USB0/USB1) routed to any physical connector on the TE0802-02-1BEV2 that supports USB Device or OTG mode?

Is it possible to configure the USB 3.0 Type-A port in USB Device mode by software only, or is it hardware limited to Host mode?

If native USB Device is not available on this board, is there any recommended modification or expansion board to expose USB0/USB1 in Device mode?

Thank you in advance for your support.

Best regards,

#5

Trenz Electronic FPGA Modules / Re: CR00240-02: Schematics mis...

Last post by Antti Lukats - January 27, 2026, 01:11:31 PM

I sent schematic to your email address. The web download for REV 02 comes also soon.

#6

Trenz Electronic FPGA Modules / Re: CR00240-02: Schematics mis...

Last post by d.signer - January 24, 2026, 12:33:17 PM

BTW the 2. link above to the schematics was obtained from the 1. link above in the Download section, however this is not for the CR00240-02-A. Where can I find the "02" version schematics?

The modifications are mentioned in the PCN in the Download section:
https://www.trenz-electronic.de/trenzdownloads/Trenz_Electronic/CRUVI/CR00240/PCN/PCN-20251204%20CR00240-01%20to%20CR00240-02%20Hardware%20Revision%20Change.pdf

But there is no information on how the MIPI signals are connected to the CRUVI connector.

#7

Trenz Electronic FPGA Modules / CR00240-02: Schematics missing...

Last post by d.signer - January 24, 2026, 09:32:48 AM

I recently got a CR00240-02 which has both a HDMI and MIPI connector and is titled "CRUVI-HS HDMI and 15-pin CSI-2 Camera Adapter":

https://www.trenz-electronic.de/en/CRUVI-HS-HDMI-and-15-pin-CSI-2-Camera-Adapter/CR00240-02-A?path=Trenz_Electronic/CRUVI/CR00240/REV01/Pictures

But the schematics:

https://www.trenz-electronic.de/trenzdownloads/Trenz_Electronic/CRUVI/CR00240/REV01/Documents/SCH-CR00240-01-A.PDF

has no sign of a MIPI connector. Is this an old out of date schematics? If yes, where can I find the current schematics?

#8

Trenz Electronic FPGA Modules / Re: TE0728 - DDR Settings

Last post by chutson - January 22, 2026, 06:40:10 PM

Compared to the defaults from the test_board using MT41J256M16 RE-125 I believe the following changes are needed.

DDR3L -> DDR3
tRC = 48.91ns -> 50.625ns
tRASmin = 35ns -> 37.5ns
tFAW = 40ns -> 50ns

#9

Trenz Electronic FPGA Modules / TE0728 - DDR Settings

Last post by chutson - January 22, 2026, 05:23:28 PM

Hello,

Looking at the test_board example, the DDR is set to DDR3L and the MT41J256M16 RE-125.  In the schematic it is using 1.5V as the supply (instead of 1.35V for DDR3L) and there is a different part number NT5CC256M16CP-DI.  Are we advised to use the settings from the test_board example?  There is some mismatch between that and the datasheet.

Thanks,
Chris

#10

Trenz Electronic FPGA Modules / Re: TE0714-04-52I-7-B 125 MHz ...

Last post by Antti Lukats - January 13, 2026, 08:43:36 AM

Hi

yes my fault I found one oscillator in the BOM and assumed it is is.

The LVDS oscillator is in the BOM only as "125MH oscillator" there is no type at all.

We may assemble with different oscillator from difference manufacturer one choice is:

DSC1123CI2-125.0000T