Recent posts

#11

Trenz Electronic FPGA Modules / Re: Quad SPI FLASH on te0711

Last post by M Kirberg - February 18, 2025, 10:54:07 AM

Look here for Xilinx examples of how to use QSPIPS driver:

https://xilinx.github.io/embeddedsw.github.io/qspips/doc/html/api/example.html

#12

Trenz Electronic FPGA Modules / Re: Quad SPI FLASH on te0711

Last post by GD26 - February 17, 2025, 02:53:13 PM

M Kirberg, thanks for your reply.

In bare metal

#13

Trenz Electronic FPGA Modules / Re: Quad SPI FLASH on te0711

Last post by M Kirberg - February 17, 2025, 10:17:56 AM

Are you talking about bare metal or linux access?

#14

CYC1000 community projects / Request for Open Source Hardwa...

Last post by huyhq29 - February 12, 2025, 11:43:35 AM

Hello everyone,

I'm currently working with the CYC1000 FPGA board (Intel Cyclone 10 LP) and have reviewed its technical documentation and 3D model. However, I'm in need of the open-source hardware files (schematics, PCB design files, or BOM) related to this board for further customization and learning purposes.

If anyone has access to these files or knows where they might be publicly available, I'd greatly appreciate your help. Links to repositories or additional resources would be amazing!

Thank you in advance for your support!

#15

Trenz Electronic FPGA Modules / Sharing Vitis Projects Across ...

Last post by ulyssesmiller - February 11, 2025, 05:41:12 AM

Hello, everyone.

I am working on a Vitis project and need to collaborate with a coworker.  We've previously utilized the share option for version control and it worked well. However, this project relies on absolute paths (e.g., to the sysroot), which causes problems when we want to transfer files between our computers.

Do you have any best practices or tutorials for properly sharing Vitis projects between two machines, particularly when dealing with these local, absolute path dependencies?  Any help on how to handle these paths or set up the project for collaborative work is greatly welcomed.

Thank you in advance.

#16

Trenz Electronic FPGA Modules / Re: Vivado doesn't detect TE0...

Last post by Alex H - February 09, 2025, 05:51:39 PM

Running sudo dmesg | grep tty in the VM says that two FTDI USB Serial Device converters are attached to ttyUSB0 and ttyUSB1.

#17

Trenz Electronic FPGA Modules / Vivado doesn't detect TE0802 ...

Last post by Alex H - February 09, 2025, 05:41:25 PM

Hi,

I'm following the getting started guide for the TE0802 dev board.

I've installed Vivado 2022.2 on a Ubuntu 2022.4 VM, created a  project using the

Code Select Expand

_create_linux_setup.sh script and opened it again using the

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vivado_open_existing_project_guimode.sh script.

According to the FTDI page, the VCP drivers should be available from Ubuntu 11.10 and later. When I have the board connected to my machine and passed through to the VM I can find it using the lsusb command.

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alexander@alexander-virtual-machine:~/Developer/TE0802_02_240/test_board$ lsusb
Bus 001 Device 005: ID 0e0f:0006 VMware, Inc. Virtual Keyboard
Bus 001 Device 006: ID 0403:6010 Future Technology Devices International, Ltd FT2232C/D/H Dual UART/FIFO IC
Bus 001 Device 003: ID 0e0f:0002 VMware, Inc. Virtual USB Hub
Bus 001 Device 002: ID 0e0f:0003 VMware, Inc. Virtual Mouse
Bus 001 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub
In vivado the hardware server is connected but cant find any devices.

Running the TE::VLAB::hw_open_jtag command in the TCL console returns No matching hw_devices were found

Is the lsusb result correct or should the device show up with a different name?

What could be the reason why vivado doesn't recognize the hardware target?

#18

Trenz Electronic FPGA Modules / Re: JTAG connection error on J...

Last post by Loketci - February 08, 2025, 03:30:01 PM

Hello again,

Thanks for your solution but it's not worked. I updated my TE0701-6 carrier board CPLD firmware to REV06 version. Somethings changed () but problem doesn't solved. I cannot connect JTAG access.

Also What do you mean newer TE0820 modules?

My module TE0820-05 version. Is that newer or not?

Also If that is not newer version Can I connect jtag mode if I insert the module TE0821-01 ? 


Could I anyway connect chance with TE0701-6 module on TE0820-5 or TE0821-1 ? Is that Yes or not. If yes How?

#19

Trenz Electronic FPGA Modules / Re: JTAG connection error on J...

Last post by JH - February 07, 2025, 11:34:56 AM

Hi,
J15 itself is for ARM JTAG debugger, not standard Xilinx JTAG.

JTAG is available over build in programmer of the TE0701 carrier.
It's the mini usb connector J7 (Point 8 on the picture):
https://wiki.trenz-electronic.de/display/PD/TE0701+TRM#TE0701TRM-MainComponents
So you need only connect this with your PC and open Vivado HW Manager an connect and you should see SoC.


With older CPLD Firmware you can switch only between QSPI und SD Boot Mode(this will be done when you insert a SD Card), JTAG only Boot Mode is not selectable. JTAG only boot mode does means, that system doesn't try to boot. It waits only for commands over JTAG. JTAG itself is available.
There is a new CPLD Firmware available where you can set Boot Mode also to JTAG only for newer TE0820 modules. Update TE0701 CPLD instructions:
https://wiki.trenz-electronic.de/display/PD/TE0701+CPLD+Firmware

The easiest way to bring up system is boot from SD, we offer also some reference designs with prebuilt binaries for test:
https://wiki.trenz-electronic.de/display/PD/TE0820+Test+Board

br
John

#20

Trenz Electronic FPGA Modules / JTAG connection error on J15 c...

Last post by Loketci - February 07, 2025, 06:18:59 AM

Hi

I try to use JTAG mode on TE0820 with xilinx Platform cable USB II(over J15 connector). But I couldn't connect. When I looked J15 connector pins, they directly goes to (x0..5) Te0820-5 Bank66 pins(They must be << 1.8V But When you on S4- 1,2,3 I t directly send these pins 3.3V and burn this bank or more.) over JM1 connector.


Is there anyway that I can Correct my TE0820-5 module alive? And I read forums there are different kind versions and problems. Is my TE0820-5 CPLD version correct? Is it need any cpld firmware update?.

(TE0701-6)To solve this problem, I remove  R20 and R21 and solder with cable J15 pins directly to U4,6,7,8 (Which I removed them too). But again it didn't work My platform cable doesn't detect anything. (it works I confirmed that)


Digging more.. I saw a problem too. But I cannot solve First and other days problem which Pulling down 0 pgood and mode pin for enabling jtag. When I use Switches, It doesn't change anything. (I read forums and it says it will be fixed Rev07 )


But now how I can confirm that my Te08-20 working and enabling jtag?