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#11
Trenz Electronic FPGA Modules / Re: Description of pins on TE0...
Last post by Antti Lukats - December 29, 2025, 04:40:21 PM
Hi,

if you look at schematic you see a RED CROSS on those wires, this is Altium desiger marking for exclusion from rules checking. This means that altium DRC passes and does not report single pin nets as error.

There is no internal connection on the board on those pins, you can simple ignore them, they used to be connected to some weird security chip in PCB rev 01
#12
Trenz Electronic FPGA Modules / Description of pins on TE0728
Last post by remy - December 29, 2025, 02:16:53 PM
Hi,

I'm making m y own carrier board to the TE0728 SoC Module and I'm not able to find description for the following pins:
J1.12 INTB
J1.14 RSTB
J1.16 FS0B
J1.15 MUX_OUT
J1.17 VCCA
J1.18 DEBUG
J1.20 LIN
J1.21 VSUP3_LIN

Would it be possible to get some inside into what these pins should/could/must be used for?

Thanks,
#13
Trenz Electronic FPGA Modules / Re: TE0745-03-72I31-A connecto...
Last post by M.Tserabei - December 22, 2025, 10:56:20 AM
I forgot to add: you can also write to us at support@trenz-electronic.de , and there we will be able to share the complete BOM file with you.

Best regards,Maksim Tserabei
#14
Trenz Electronic FPGA Modules / Re: TE0745-03-72I31-A connecto...
Last post by M.Tserabei - December 22, 2025, 10:32:23 AM
Good afternoon.

I'm not sure that we can share the complete BOM file. However, you are welcome to ask us about specific items that raise questions, and we will provide you with the exact part names.

Best regards, Maksim Tserabei
#15
Trenz Electronic FPGA Modules / Re: TE0745-03-72I31-A connecto...
Last post by zhouxltx - December 22, 2025, 07:34:05 AM
Hi John:
   How to find BOM file for TE0745 carrier board?

Regards
Brian
#16
Trenz Electronic FPGA Modules / Re: TE0745-03-72I31-A connecto...
Last post by JH - December 19, 2025, 08:28:35 AM
Hi,
Bootmode_1 is only connected between CPLD and FPGA.

On default delivered firmware Bootmode_1 is constant 1, in this case you can only switch between QSPI and SD with B2B Pin J2-133 (Bootmode).

With newer Vivado Versions it's not longer so easy to program QSPI in case boot mode isn't JTAG only.

To have JTAG and QSPI as boot mode available update alternative CPLD firmware:
https://www.trenz-electronic.de/trenzdownloads/Trenz_Electronic/Modules_and_Module_Carriers/5.2x7.6/TE0745/REV03/Firmware/SC-PGM-TE0745-03_SC0745-03_20240219.zip
--> it's in the subfolder BOOTMODE_VAR-2

Update instructions:
https://wiki.trenz.local/display/PD/TE0745+CPLD+Firmware

In this case you can use MIO0 Pin (J2-137) to control Bootmode_1 signal to select also JTAG boot mode only.

On TE0745 there is unfortunately no other option to add JTAG only mode without changing B2B connector pinout.

On your carrier I would also recommand to make JTAG_EN (J1-148) selectable via DIP switch, this is need to get access to CPLD.

br
John
#17
Trenz Electronic FPGA Modules / Re: TE0745-03-72I31-A connecto...
Last post by zhouxltx - December 17, 2025, 03:28:53 PM

I didn't see MIO5 (bootmode1) on TE0745-03-72I31-A SS5 connector, but I also don't have plan to use SD card?
What should I do?
My plan is to use TE0790 to boot my daugther board for TE0745-03-72I31-A FPGA board.

Regards
Brian
#18
Trenz Electronic FPGA Modules / Re: TE0745-03-72I31-A connecto...
Last post by JH - December 17, 2025, 08:46:41 AM
Hi,
0: QSPI, 1 SD

https://wiki.trenz-electronic.de/display/PD/TE0745+CPLD#TE0745CPLD-BootMode

there is an optional firmware available which use Card detect pin from SD card to switch also to JTAG only, because writing QSPI flash with Vivado is not longer so easy possible if boot mode is not set to jtag only.

br
John
#19
Trenz Electronic FPGA Modules / Re: TE0745-03-72I31-A connecto...
Last post by zhouxltx - December 17, 2025, 08:30:30 AM
On TE0745-03-72I31-A board, BOOTMODE has pulldown.
This is for  QSPI mode or Jtag mode to boot?

Regards
Brian


#20
Trenz Electronic FPGA Modules / Re: TE0745-03-72I31-A connecto...
Last post by JH - December 16, 2025, 08:07:26 AM
Hi Brian,

you find the orientation and distance of the connectors on the ad file:
https://www.trenz-electronic.de/trenzdownloads/Trenz_Electronic/Modules_and_Module_Carriers/5.2x7.6/5.2x7.6_Carriers/TEB0745/REV02/Documents/AD-TEB0745-02.PDF



Different between J12 and J13 is the pinout.
J12 pinout is for usage with our TE0790 programmer, where you can use JTAG and UART together over USB.
J30 Pinout is for AMD Platform programmer or digilent HS3 programmer for JTAG only.

br
John