Author Topic: Creating XIP_MODE need help  (Read 470 times)

PitG

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Creating XIP_MODE need help
« on: October 07, 2021, 03:41:33 PM »
Hello,

   Although there is quite a bit information on the net about XIP_MODE, I'm still confused about it and can't solve it alone. So I.ve started this topic hoping it help me and the others.
Let's start from the beginning. I use TE0722 DDR less board. I have no problem with programming this board according description on the Trenz web. Without problem I've adopted original hw by adding new IPs according to my needs in Vivado. Next, in Vitis, I've created platform project based on XSA file exported from Vivado. Then, I've added empty application project. Next, in folder:  ...platformprojectname/zynq_fsbl/ I've added a new mynewfile.c in which I've written my own program. Besides into this folder I've copied following files from original Trenz project: main.c, fsbl_hooks.s, fsbl_hooks.h and all files starting from te..   . mynewfile.c is called inside function "TE_FsblHookBeforeHandoff". Next I've built platformproject and application project; created boot image with default setting but applicationproject.elf in "boot image partition" windows I've deleted, so only two partition in this window were left: bootloader... and ...zsys_wrapper.bit. Finally, I've programmed flash, with  options: Project Type:system and Fsbl file browsed from original Trenz file : ..._binaries_TE0722-02\res_elf\fsbl_flash.elf . Flash memory on the board must be written without error, but sometimes it happens to me that I did something wrong and then I can't program flash memory. Then I use recovery procedure for Trenz board described on the web and repeat programming flash. At this point flash memory on the board is programmed and everything is OK. Now I can switch in Vitis to Debug window and inside "Vitis serial terminal" after choosing right com port I can see result through UART port. :)

The problem is that my own program run during fsbl and I can't for example start normally second CPU an use normally interrupts (at least I can't). So first I'd like to change created fsbl bootloader into XIP_MODE and next move my own program (from mynewfile.c) into application normally run in CPU0 and CPU1 after finishing fsbl. Unfortunately I can't do these two steps correctly and I'm looking for someone to help me with these.
I tried to convert this project into XIP_MODE by changing settings in ...application_system.bif file used during creating boot image :
- for bootloader fsbl : offset=0x1700; startup=0xfc001700 (start address region for qspi_flash + offset); adding xip_mode option by editing  ...bif file (like described in ug1283-bootgen-user-guide),
- for ...zsys_wrapper.bit : offset=0x200000
Then boot image in Vitis is created without any error. Now I can see my newly created BOOT.bin file with help of "bootgen_utility" in "Vitis shell" window, but remember it must be set right directory  (like described in ug1283-bootgen-user-guide). It seems that new BOOT.bin is correct for xip_mode because in created info.txt from BOOT.bin in BOOT HEADER section I see:
- Load Image Byte Offset             - 0x1700
- Load Image Byte Length             - 0x00
- Image Load Byte Address            - 0x00
- Image Execution Byte Address       - 0xfc001700
- Total Image Byte Length            - 0x00
- from address 0x00001700 starts Partition 1
- from address 0x00200000 starts Partition 2
These data seems to be correct according manual ug585 page 171 for xip_mode (is it right ?).
Unfortunately after program flash and make a reset on board nothing happens through UART in "Vitis serial terminal" and red LED on TE0722 board is lit constantly. Why ?  :'(
I found page on the web "Zynq-7000 AP SoC Boot - Booting and Running Without External Memory Tech Tip" but I still don't know precisely what to change more and where in my project.
The rest are only questions.


All the best,
Piotr


JH

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Re: Creating XIP_MODE need help
« Reply #1 on: October 12, 2021, 07:38:25 AM »
Hi,
sorry I didn't used XIP mode until now, so I can only show you the links, which you has found by yourself.
I would suggest you write also one time to the xilinx forum, they have bigger community there and it's more SoC internal question.
br
John

PitG

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Re: Creating XIP_MODE need help
« Reply #2 on: October 12, 2021, 09:50:59 AM »
Thank you for advice. I'll try.

All the best,
Piotr