Author Topic: Clock input power level to TEBF0808-04 board  (Read 469 times)

rjohn

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Clock input power level to TEBF0808-04 board
« on: September 03, 2021, 10:26:23 AM »
We recently purchased a TE0808-04-9BE21-A starter kit, TE0808-04-9BE21-A (module) + TEBF0808-04 (baseboard). In order to access the FPGA I/O we purchased a Xilinx FMC XM105 breakout board as recommended.
We wanted to use the J9 SMA connector on the breakout board in order to feed a single ended clock to the FPGA, it maps to J5-G2 (schematic name B48_L6_P).

Even though this is an HD bank pin, as the max FMC_VADJ on the baseboard is 1.8 V, I have mapped the FPGA pin as LVCMOS18.

Our question is, will feeding a an analogue 10 MHz clock into that SMA  at 10 dBm 50 Ohm , be fine?

Antti Lukats

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Re: Clock input power level to TEBF0808-04 board
« Reply #1 on: September 03, 2021, 11:47:53 AM »
FPGA IO are not actually meant to be supplied with analog signal, so the 50ohm 1V p-p signal may not work. The IO possibe would not die, but may be that it is not working also. In any case the direct connection is not recommended even if it may work.

10db 50R is 1v p-p, centered around 0V, really not sure if it will work or not, in any case this direct connection is not recommended for real projects.

rjohn

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Re: Clock input power level to TEBF0808-04 board
« Reply #2 on: September 03, 2021, 12:31:07 PM »
Okay, thanks for the prompt response.