Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: jon on September 08, 2021, 07:40:16 PM

Title: TE0722 DIPFORTy1 Rebooting While Operating
Post by: jon on September 08, 2021, 07:40:16 PM
Dear Trenz Team,

I'm trying to use the TE0722 with some code, when I debug it, the code execution is stopped after like 30 seconds with the message:
"Secondary FPGA Image Loaded..".

I see that other users have had a similar problem, but I don't know how to fix it. I would like to avoid it appearing.
I would appreciate some help :)
Title: Re: TE0722 DIPFORTy1 Rebooting While Operating
Post by: JH on September 09, 2021, 06:44:26 AM
Hi,
can you share the whole boot log?
br
John
Title: Re: TE0722 DIPFORTy1 Rebooting While Operating
Post by: jon on September 09, 2021, 10:20:02 AM
Dear John,
Thanks for your very quick reply.

I'm not sure what you mean with the boot log. Here I'm pasting what I get from the XSCT console:

xsct%
initializing
  0%    0MB   0.0MB/s  ??:?? ETA
100%    0MB   2.5MB/s  00:00   

Downloading Program -- C:/Users/x/workspace/MHz_Buck_v4/MHz_Buck_DSP/Debug/MHz_Buck_DSP.elf
section, .text: 0x00000000 - 0x0000fee7
section, .init: 0xffff0000 - 0xffff000b
section, .fini: 0xffff000c - 0xffff0017
section, .rodata: 0xffff0018 - 0xffff1e7b
section, .data: 0x0000fee8 - 0x00013e3f
section, .eh_frame: 0xffff1e7c - 0xffff1e7f
section, .mmu_tbl: 0xffff4000 - 0xffff7fff
section, .ARM.exidx: 0xffff8000 - 0xffff8007
section, .init_array: 0xffff8008 - 0xffff800b
section, .fini_array: 0xffff800c - 0xffff800f
section, .bss: 0xffff8010 - 0xffff847f
section, .heap: 0xffff8480 - 0xffffa47f
section, .stack: 0xffffa480 - 0xffffdc7f

  0%    0MB   0.0MB/s  ??:?? ETA
100%    0MB   0.5MB/s  00:00   

Setting PC to Program Start Address 0x00000000
Successfully downloaded C:/Users/x/workspace/MHz_Buck_v4/MHz_Buck_DSP/Debug/MHz_Buck_DSP.elf
Info: ARM Cortex-A9 MPCore #0 (target 2) Stopped at 0x1a10 (Suspended)
_vector_table() at asm_vectors.S: 71
71: B _boot
xsct% Info: ARM Cortex-A9 MPCore #0 (target 2) Running


The problem is that after like 30 seconds I get the "Secondary FPGA Image Loaded.." in the UART and it's exactly the point at which stops executing my code (it's a simple PWM singal generation).
This is a serious problem for us.
If it helps, I've also noticed that in the "debug" tab, when I start with my code and the PWM is running (see "before" in the attached screenshot") the "Legacy Debug Hub" is there, but after the message of "Secondary FPGA Image Loaded.." appears in UART and my code stops working, the "Legacy Debug Hub" is no more there (see "after" in the attached screenshot").

Note that:

Thanks a lot,
Jon

Title: Re: TE0722 DIPFORTy1 Rebooting While Operating
Post by: JH on September 09, 2021, 10:45:33 AM
Hi,
the question is where "Secondary FPGA Image Loaded.." comes from. You load your application over SDK. Therefore, it can either be from your application. Or you has some other application stored in the qspi flash and system reboots from QSPI (maybe you has a power or temperature problem or something else which force the zynq to reboot) and this messages is maybe from an FSBL (bootloader) which is stored in the QSPI flash and this boot loader try to find some image.

br
John
Title: Re: TE0722 DIPFORTy1 Rebooting While Operating
Post by: jon on September 09, 2021, 10:59:09 AM
Hi John,
Thanks again for your very quick reply.

From this post: https://forum.trenz-electronic.de/index.php?topic=737.0 (https://forum.trenz-electronic.de/index.php?topic=737.0)
It seems that the "Secondary FPGA Image Loaded.." comes from the delivered design.
I get this message even if I try it out in a new TE0722, so it's not something I'm doing myself (I think).
It's also weird, because I search for text saying "Secondary FPGA Image Loaded.." and it doesn't appear in the whole folder where I have the Vitis workspace.

Something that is weird is that although I deactivated the SD card in Vivado, when I compile the application project, it's always generating the sd_card folder with a boot.bin image...
And if I delete it, when I recompile, it always appears there. Could it be that which it's trying to load?
How could I avoid it being generated during the build?

Thanks,
Jon
Title: Re: TE0722 DIPFORTy1 Rebooting While Operating
Post by: jon on September 09, 2021, 11:25:47 AM
Update:
When generating the platform, I didn't tick the "generate boot image", which now doesn't generate the boot.bin file in the Debug folder, but I still have the "Secondary FPGA Image Loaded..".

If it helps, each time I download the program with the debugger, the "Secondary FPGA Image Loaded.." always appears before the "Hello World".
And this, as you see from here https://forum.trenz-electronic.de/index.php?topic=737.0 (https://forum.trenz-electronic.de/index.php?topic=737.0), is predelivered... and I don't know how to tackle it..

Thanks!
Jon
Title: Re: TE0722 DIPFORTy1 Rebooting While Operating
Post by: jon on September 09, 2021, 11:52:20 AM
Update 2:
I don't know why the Zynq is resetting.

Thanks,
Jon
Title: Re: TE0722 DIPFORTy1 Rebooting While Operating
Post by: JH on September 13, 2021, 07:08:52 AM
Hi,
which power supply unit did you use? Laboratory power supply? Did you set some current limit?

Can you program QSPI flash with our reference design prebuilt Boot.bin?
Which assembly variant of TE0722 did you bough?
https://shop.trenz-electronic.de/en/Products/Trenz-Electronic/TE07XX-Zynq-SoC/TE0722-Zynq-SoC/

br
John