Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: antoni on June 29, 2021, 03:29:31 PM

Title: TE0715 FSBL (TE0715-04-30-1I3)
Post by: antoni on June 29, 2021, 03:29:31 PM
Hello,

I have built FSBL for TE0715 board (with TE0705 "motherboard") after patching it with files found here (https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0715/Reference_Design/2018.2/test_board) in directory: sw_lib/sw_apps/zynq_fsbl, but only using the following:
Everything seems to work just fine.
However, when I try also to patch ps7_init.* files, the FSBL hangs/stops at some initial state.

Questions:
The diff between ps7_init.h files is included below. File provided by Trenz is on the left, the one generated by hsi tool on the right.

I use the prebuilt/hardware/03_30_1i/test_board.hdf from the same link as I get the FSBL "patch".

Just for clarity: Everything works fine when I don't patch ps7_init.* files. But I have no idea whether should I...

Software version:

$ hsi -version
hsi v2018.2 (64-bit)
SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.


$ vivado -version
Vivado v2018.2 (64-bit)
SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018
Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.
Title: Re: TE0715 FSBL (TE0715-04-30-1I3)
Post by: Antti Lukats on July 01, 2021, 12:05:42 PM
Quote from: antoni on June 29, 2021, 03:29:31 PM
Hello,

I have built FSBL for TE0715 board (with TE0705 "motherboard") after patching it with files found here (https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0715/Reference_Design/2018.2/test_board) in directory: sw_lib/sw_apps/zynq_fsbl, but only using the following:

  • fsbl-hooks.c
  • main.c
  • register_map.h
  • si5338.*
Everything seems to work just fine.
However, when I try also to patch ps7_init.* files, the FSBL hangs/stops at some initial state.

Questions:

  • Do I need also to patch ps7_init.* files, or can I leave them as they are after being generated by the hsi tool?
  • Are settings found are important from the point of view of the HDF/bitstream file? (There are stuff like CAN or FPGA frequency, etc...)
The diff between ps7_init.h files is included below. File provided by Trenz is on the left, the one generated by hsi tool on the right.

I use the prebuilt/hardware/03_30_1i/test_board.hdf from the same link as I get the FSBL "patch".

Just for clarity: Everything works fine when I don't patch ps7_init.* files. But I have no idea whether should I...

Software version:

$ hsi -version
hsi v2018.2 (64-bit)
SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.


$ vivado -version
Vivado v2018.2 (64-bit)
SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018
Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.


what do you mean by "patching ps7_init.*" ? You should not patch them manually, use as generated with the tools!


Title: Re: TE0715 FSBL (TE0715-04-30-1I3)
Post by: antoni on July 01, 2021, 12:26:22 PM
Quote from: Antti Lukats on July 01, 2021, 12:05:42 PM
what do you mean by "patching ps7_init.*" ? You should not patch them manually, use as generated with the tools!

That is what I did -- I used those that were generated by the hsi tool. Thanks for confirming!