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# HDMI
set_property IOSTANDARD TMDS_33 [get_ports {hdmi_tx_clk_p hdmi_tx_clk_n}]
set_property PACKAGE_PIN R7 [get_ports hdmi_tx_clk_p]
set_property PACKAGE_PIN R8 [get_ports hdmi_tx_clk_n]
set_property IOSTANDARD TMDS_33 [get_ports {hdmi_tx_d_p[*] hdmi_tx_d_n[*]}]
set_property PACKAGE_PIN P9 [get_ports {hdmi_tx_d_p[0]}]
set_property PACKAGE_PIN P8 [get_ports {hdmi_tx_d_n[0]}]
set_property PACKAGE_PIN P10 [get_ports {hdmi_tx_d_p[1]}]
set_property PACKAGE_PIN R10 [get_ports {hdmi_tx_d_n[1]}]
set_property PACKAGE_PIN P11 [get_ports {hdmi_tx_d_p[2]}]
set_property PACKAGE_PIN R11 [get_ports {hdmi_tx_d_n[2]}]
QuoteERROR: [DRC UCIO-1] Unconstrained Logical Port: 2 out of 43 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined. To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: hdmi_tx_d_p[0], and hdmi_tx_d_n[0].
// Read register 4
Status = XEmacPs_PhyRead(&Emac, 0x1A, 4, &rval16); if(Status != XST_SUCCESS){ return XST_FAILURE; }
cpld_rev = (rval16 & 0x00FF);
if (cpld_rev <= 6)
{
speed_grade = (rval16 >> 14) & 3;
/* 0=C, 1=E, 2=I, 3=A */
if ((rval16 & 0x3000)==0x0000) { temp_grade = 0x43; }
else if ((rval16 & 0x3000)==0x1000) { temp_grade = 0x45; }
else if ((rval16 & 0x3000)==0x2000) { temp_grade = 0x49; }
else if ((rval16 & 0x3000)==0x3000) { temp_grade = 0x41; }
else { temp_grade = 0x20; }
if ((rval16 & 0x0F00)==0x000) { model1 = 0x20;model2 = 0x20;model3 = 0x46; }
else if ((rval16 & 0x0F00)==0x100) { model1 = 0x20;model2 = 0x20;model3 = 0x52; }
else if ((rval16 & 0x0F00)==0x200) { model1 = 0x20;model2 = 0x4C;model3 = 0x46; }
else if ((rval16 & 0x0F00)==0x300) { model1 = 0x31;model2 = 0x34;model3 = 0x53; }
else { model1 = 0x31;model2 = 0x31;model3 = 0x31; }
xil_printf("\n\rSoM: TE0720-0%d-%d%c%c%c%c SC REV:%02x", pcb_rev, speed_grade, temp_grade, model1, model2, model3, rval16 & 0xFF);
xil_printf("\n\rMAC: ");
for(i = 0; i < 6; i++) {
xil_printf("%02x ", mac_addr[i]);
}
xil_printf("\n\r");
}
else
{
Status = XEmacPs_PhyRead(&Emac, 0x1A, 4, &rval16); if(Status != XST_SUCCESS){ return XST_FAILURE; }
wdt = (rval16 >> 14) & 0x3;
if (wdt == 0b00)
{
wdt_status = "Deactive";
}else if (wdt == 0b01)
{
wdt_status = "Hardware_WDT";
}else if (wdt == 0b10)
{
wdt_status = "Software_WDT";
}else if (wdt == 0b11)
{
wdt_status = "No WDT chip on the board. SOftware_WDT with PL clock";
}
boot_gen = (rval16 >> 12) & 0x3;
if (boot_gen == 0b00)
{
bootmode_gen = "QSPI/SD";
}else if (boot_gen == 0b01)
{
bootmode_gen = "QSPI/JTAG";
}else if (boot_gen == 0b10)
{
bootmode_gen = "JTAG/SD";
}else if (boot_gen == 0b11)
{
bootmode_gen = "default QSPI/JTAG/SD";
}else
{
bootmode_gen = "undefined";
}
pudc = (rval16 >> 11) & 0x1;
if (pudc==1)
{
pudc_mode = "Pulldown";
} else
{
pudc_mode = "Pullup";
}
Status = XEmacPs_PhyRead(&Emac, 0x1A, 4, &rval16); if(Status != XST_SUCCESS){ return XST_FAILURE; }
cpld_bm = (rval16 >> 10)& 0x01;
if (cpld_bm == 0)
{
cpld_bootmode = "Deactive";
// Read register 4
Status = XEmacPs_PhyRead(&Emac, 0x1A, 4, &rval16); if(Status != XST_SUCCESS){ return XST_FAILURE; }
boot = (rval16 >> 8) & 0x3;
if (boot == 0b00)
{
boot_mode = "JTAG";
}
else if (boot == 0b10)
{
boot_mode = "QSPI";
}
else if (boot == 0b11)
{
boot_mode = "SD Card";
}
else if (boot == 0b01)
{
boot_mode = "undefined";
}
// xil_printf("\n\rSoM: TE0720 CPLD_BM=%s(%x) BOOTMOD_GEN=%x(%s) PUDC_MODE=%s(%d) BOOT_MODE=%s(%x) CPLD_REV=%02x", cpld_bootmode, cpld_bm, boot_gen, bootmode_gen, pudc_mode, pudc, boot_mode, boot, cpld_rev);
// xil_printf("\n\rSoM: TE0720 WDT_STATUS=%s(%x) CPLD_BM=%s(%x) BOOTMOD_GEN=%x(%s) PUDC_MODE=%s(%d) BOOT_MODE=%s(%x) CPLD_REV=%02x", wdt_status, wdt, cpld_bootmode, cpld_bm, boot_gen, bootmode_gen, pudc_mode, pudc, boot_mode, boot, cpld_rev);
xil_printf("\n\rCPLD_REV=%02x\n\r",cpld_rev);
xil_printf("\n\rWDT_STATUS=%s(%x)\n\r", wdt_status,wdt);
xil_printf("\n\rCPLD_BM=%s(%x)\n\r",cpld_bootmode, cpld_bm);
xil_printf("\n\rBOOTMOD_GEN=%x(%s)\n\r", boot_gen, bootmode_gen);
xil_printf("\n\rPUDC_MODE=%s(%d)\n\r", pudc_mode, pudc);
xil_printf("\n\rBOOT_MODE=%s(%x)\n\r", boot_mode, boot);
} else
{
cpld_bootmode="Active";
// Read register 12 (CR4[15:8])
Status = XEmacPs_PhyRead(&Emac, 0x1A, 12, &rval16); if(Status != XST_SUCCESS){ return XST_FAILURE; }
boot = (rval16 >> 8) & 0x3;
if (boot == 0b01)
{
boot_mode = "JTAG";
}
else if (boot == 0b10)
{
boot_mode = "QSPI";
}
else if (boot == 0b11)
{
boot_mode = "SD Card";
}
else if (boot == 0b00)
{
boot_mode = "undefined";
}
// xil_printf("\n\rSoM: TE0720 CPLD_BM=%s(%x) BOOTMOD_GEN=%x(%s) PUDC_MODE=%s(%d) BOOT_MODE=%s(%x) CPLD_REV=%02x", cpld_bootmode, cpld_bm, boot_gen, bootmode_gen, pudc_mode, pudc, boot_mode, boot, cpld_rev);
// xil_printf("\n\rSoM: TE0720 WDT_STATUS=%s(%x) CPLD_BM=%s(%x) BOOTMOD_GEN=%x(%s) PUDC_MODE=%s(%d) BOOT_MODE=%s(%x) CPLD_REV=%02x", wdt_status, wdt, cpld_bootmode, cpld_bm, boot_gen, bootmode_gen, pudc_mode, pudc, boot_mode, boot, cpld_rev);
xil_printf("\n\rCPLD_REV=%02x\n\r",cpld_rev);
xil_printf("\n\rWDT_STATUS=%s(%x)\n\r", wdt_status,wdt);
xil_printf("\n\rCPLD_BM=%s(%x)\n\r",cpld_bootmode, cpld_bm);
xil_printf("\n\rBOOTMOD_GEN=%x(%s)\n\r", boot_gen, bootmode_gen);
xil_printf("\n\rPUDC_MODE=%s(%d)\n\r", pudc_mode, pudc);
xil_printf("\n\rBOOT_MODE=%s(%x)\n\r", boot_mode, boot);
}
xil_printf("\n\rMAC: ");
for(i = 0; i < 6; i++) {
xil_printf("%02x ", mac_addr[i]);
}
xil_printf("\n\r");
}
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