Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: Tracquan on May 29, 2020, 12:45:30 AM

Title: test_board.bit For TE0715-04
Post by: Tracquan on May 29, 2020, 12:45:30 AM
We are developing a software on the TE0715-04 SOM that sits on the TE0701 carrier board.  We use Green Hill JTAG probe.  I have a question about test_board.bit in 2018.3's \test_board\prebuilt\hardware\04_12s_1c_1gb\ .  Does this bitstream expose the PL side PJTAG pins to the ARM JTAG connector J15 on the  TE0701 carrier board?
Title: Re: test_board.bit For TE0715-04
Post by: JH on May 29, 2020, 08:19:19 AM
Hi,
bitstream (.bit) is only PL Part. PS will be not initialised with bitstream only!

And we did not implement PJTAG  over PL in our reference design. See documentation or create the project from the download sources:
https://wiki.trenz-electronic.de/display/PD/TE0715+Test+Board


br
John