Dear,
The synthesis will failed by w/o axi_lib when I tried to re-package axi-reg32 ip.
Where could I got the axi_lib vhdl source code ?
Or any partial vhdl source for only could synthesis the axi_reg32 pass?
Thank you.
Hi,
ip is included into this demo design:
\ip_lib\axi_reg32_1.0
br
John