Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: stvo on April 17, 2017, 10:27:52 PM

Title: Zynqberry csi Camera distortion due to encryption delay
Post by: stvo on April 17, 2017, 10:27:52 PM
Hello,

in my Project i have to implement Camera stream encryption.

In the current design contains a 128 bit Key/block modul.

the delay is  between 12 and 21 tacts  , depend on AES Implementation, and this delay causes a distortion.

My question is, what i have to consider or change in the zynqberry demo 1 To compensate the delay?

Regards
Stefan
Title: Re: Zynqberry csi Camera distortion due to encryption delay
Post by: Oleksandr Kiyenko on April 18, 2017, 07:59:20 AM
Hello,

At which part of video datastream are you insert your encription core ?
As first step you can try to add FIFOs before and after your core it can help.

Best regards
Oleksandr Kiyenko
Title: Re: Zynqberry csi Camera distortion due to encryption delay
Post by: stvo on April 19, 2017, 10:58:14 AM
Hello Oleksandr,

my core is between video_resize and the VDMA.
I verify the data order with the ILA, this seeems not the problem. I  control the data stream by the signals s_tready, m_tvalid and pass the signals  s_tuser , t_last.
in the attachments is a image how the destortion look like.


Best Regardes ,
Stefan