Hi,
reference design for TE841 shows separate usage of both DDR4 chips. I'd like to ask if there is some possibility to join both DDR4 into single memory interface? I need speed around 4GB per second, so using only one chip does not work for me.
Thank you for advice and regards
Petr
There are 2 DDR4 IP Cores needed, so if you an load balance the bandwidth to 2 AXI busses, then it you can use both, but there it is not possible to join them so that they appear as one memory.
Hi,
I thought that, but I wanted to be sure. Thanks.
Petr