Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: gstlachi on February 23, 2016, 06:37:17 PM

Title: TE0722 info
Post by: gstlachi on February 23, 2016, 06:37:17 PM
Hi,

I just got two TE0722. I want to do many things with it. Do you have more info: data sheet, user manual??. I have the schematic but no very clear for me. I have not worked with ramless(DDR) board before. Please, could you have examples or projects for standalone or linux.

Thank you.
Kind of regards
Title: Re: TE0722 info
Post by: Thorsten Trenz on February 25, 2016, 09:09:41 AM
Hi,

with Vivado 2015.4 you should disable DDR in PS settings, and then it is needed to comment out the DDR init in the generated ps7_init.c and in the main FSBL the #ifdef for DDR must be changed to enable the bootloader code.

Then the FSBL can configure the FPGA from SPI in linear mode.

We are this week at embedded world, I will see that we publish more DDR less examples early next week.

for TE0722 only standalone apps are possible, as there is no external RAM. Standalone apps can run from SPI Flash in XiP mode, so the code size is not limited, but RAM size is constrained to the OCM and or extra ram made out of BRAM in the PL
Title: Re: TE0722 info
Post by: gstlachi on February 29, 2016, 05:51:24 PM
Hi,

Thank you for the suggestions. I will be looking for examples.

Kind of regards.