Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: razi marjani on May 28, 2014, 04:58:58 PM

Title: One Wire IC on TE600
Post by: razi marjani on May 28, 2014, 04:58:58 PM
Hi
I trying to use axi_one_wire_v1 in my project to obtain MAC address from ds2505-e48.
But when I examined the verilog code I found that the search algorithm of 1-wire protocol hasn't been implemented,
I think using this ip could cause conflict on 1-wire.
because there is ds2432 on same line.
Is this True?
Must I add search algorithm to code?
thanks
Title: Re: One Wire IC on TE600
Post by: Oleksandr Kiyenko on May 28, 2014, 05:18:14 PM
Hi Razi,

VHDL code for axi_1wire_v1_00_a core implement only low level 1-wire interface. To read IP address you need software implemantation of 1-wire search read and write.
You can found example in reference project GigaBee_XPS14.2-Base/sw_export/eth_test/src/1wire.c

Best regards
Oleksandr Kiyenko
Title: Re: One Wire IC on TE600
Post by: razi marjani on May 29, 2014, 08:27:43 AM
Thanks alot