Trenz Electronic GmbH Support Forum

Community => CYC1000 community projects => Topic started by: jakubcabal on April 25, 2021, 12:39:36 PM

Title: Spirit Level example design without NIOS
Post by: jakubcabal on April 25, 2021, 12:39:36 PM
Hi to all, I tried the accelerometer on the CYC1000 FPGA board. The result is the Spirit Level example (without NIOS) for CYC1000 in my GitHub repository with SPI controllers (https://github.com/jakubcabal/spi-fpga). In this repository I also started using GHDL tool in GitHub Actions to automate my VHDL simulations. It is an easy-to-use CI for VHDL projects. You can use it as inspiration.

(https://github.com/jakubcabal/spi-fpga/raw/master/docs/spirit_level_example.gif)
Title: Re: Spirit Level example design without NIOS
Post by: shelton on May 26, 2021, 02:34:39 PM
Thanks a lot, that's all I was looking for!
Title: Re: Spirit Level example design without NIOS
Post by: allegedcape on September 28, 2023, 10:29:25 AM
Thanks a lot! this tips is very useful for me.