Hello,
we have a TE0808 (xczu9eg-es2) and would like to use partial reconfiguration in our design. As mentioned in https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_2/ug909-vivado-partial-reconfiguration.pdf p.7 "[Partial] Bitstream generation is disabled by default for these devices". Could you help us on how to enable this feature for our ES2 device? This is the specific error we get:
ERROR: [Vivado 12-4164] Partial Reconfiguration bitstream generation is not supported for part xczu9eg-ffvc900-1-e-es2.
Kind regards
Marvin
Hi,
try this: https://forums.xilinx.com/t5/Vivado-TCL-Community/Vivado-2017-1-Enable-Partial-Reconfiguration-will-make-the/td-p/765522
But I think this would not work. It seems PR is not supported for ES devices.
br
John
Unfortunately, this does not help. Partial reconfiguration is enabled in Vivado and Place&Route does work, but bitstream generation fails. In fact, it seems it is not supported for ES.
Thanks
Marvin
Hi,
there are different ways to generate partial reconfiguration files. One way is make only difference between 2 files.
Maybe you can try this:
https://forums.xilinx.com/t5/Design-Methodologies-and/difference-based-partial-reconfiguration-in-vivado/td-p/495020
Try with 2 bitfiles from this device.
This was possible on old ISE. But I never tried on vivado:
https://www.xilinx.com/support/documentation/application_notes/xapp290.pdf
So if this option works. Make hierarchical design flow generate partitions on vivado floorplanner. Make one static and one pr region. Set a little gap between this areas and check routing on floorplanner.
Export static placement and use this on 2 projects. Change only pr part and make differential files.
If you use differential based PR, you must generate files for all combination of reloads.
In case of 2 different PR design A,B. A->B and B->A
Hierarchical Design Flow is nearly the same only with less restriction. So you must check this manually.
br
John